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| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-02-16 20:44:20 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-02-17 19:04:31 +0100 |
| commit | 472efa604158c193bdcd8f357ca52c41eca53ca5 (patch) | |
| tree | b44dbe7045988d316f03a807ef34fc360e2ca31a /src/northbridge | |
| parent | d13e4167a903c1bd69c9ed708987f016dff13d1d (diff) | |
| download | coreboot-472efa604158c193bdcd8f357ca52c41eca53ca5.tar.xz | |
Remove whitespace.
Fix issues reported by new lint test.
Change-Id: I077a829cb4a855cbb3b71b6eb5c66b2068be6def
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/646
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rwxr-xr-x | src/northbridge/amd/agesa/family12/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/Kconfig | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/gx2/northbridgeinit.c | 6 |
4 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/amd/agesa/family12/Makefile.inc b/src/northbridge/amd/agesa/family12/Makefile.inc index 3bda8d5cc4..8f0fe0d773 100755 --- a/src/northbridge/amd/agesa/family12/Makefile.inc +++ b/src/northbridge/amd/agesa/family12/Makefile.inc @@ -16,7 +16,7 @@ # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # - + driver-y += northbridge.c -ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl
\ No newline at end of file +ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt.asl diff --git a/src/northbridge/amd/agesa/family14/Makefile.inc b/src/northbridge/amd/agesa/family14/Makefile.inc index 899d517055..d3a125c57a 100644 --- a/src/northbridge/amd/agesa/family14/Makefile.inc +++ b/src/northbridge/amd/agesa/family14/Makefile.inc @@ -16,5 +16,5 @@ # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # - + driver-y += northbridge.c diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 74e0ff454b..a14339e52a 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -119,5 +119,5 @@ config SVI_HIGH_FREQ help Select this for boards with a Voltage Regulator able to operate at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3. - + source src/northbridge/amd/amdfam10/root_complex/Kconfig diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c index e55efcb667..37fcf7e307 100644 --- a/src/northbridge/amd/gx2/northbridgeinit.c +++ b/src/northbridge/amd/gx2/northbridgeinit.c @@ -335,7 +335,7 @@ static void GLPCIInit(void) /* we are ignoring the 5530 case for now, and perhaps forever. */ /* 553X NB Init */ - + /* Arbiter setup */ msrnum = GLPCI_ARB; msr = rdmsr(msrnum); @@ -404,7 +404,7 @@ static void ClockGatingInit(void) static void GeodeLinkPriority(void) { msr_t msr = { 0, 0 }; - + struct msrinit *prio = GeodeLinkPriorityTable; int i; @@ -426,7 +426,7 @@ static void GeodeLinkPriority(void) static uint64_t getShadow(void) { msr_t msr = { 0, 0 }; - + msr = rdmsr(GLIU0_P2D_SC_0); return ( ( (uint64_t) msr.hi ) << 32 ) | msr.lo; } |