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authorNico Huber <nico.h@gmx.de>2018-10-06 18:01:30 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-22 08:36:38 +0000
commit68dd00d634715d34f839985802d9dbf195db2bb3 (patch)
tree8e607c558731d2b2d3ab418b7a12f6557c1d8ac1 /src/northbridge
parentf677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (diff)
downloadcoreboot-68dd00d634715d34f839985802d9dbf195db2bb3.tar.xz
nb/via/vx900: Use CF9 reset
Implement board_reset() as "system reset". Change-Id: I2b68a23cdf244884104d4ed54e19d3ab347c3a3e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29055 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/vx900/Kconfig2
-rw-r--r--src/northbridge/via/vx900/northbridge.c5
2 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig
index b666767f92..8d95942866 100644
--- a/src/northbridge/via/vx900/Kconfig
+++ b/src/northbridge/via/vx900/Kconfig
@@ -20,7 +20,7 @@ config NORTHBRIDGE_VIA_VX900
select DRIVERS_GENERIC_IOAPIC
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
- select HAVE_HARD_RESET
+ select HAVE_CF9_RESET
select NO_RELOCATABLE_RAMSTAGE
if NORTHBRIDGE_VIA_VX900
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index 66b2def370..a699d86ed1 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -23,6 +23,7 @@
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cbmem.h>
+#include <cf9_reset.h>
#include <lib.h>
#include <reset.h>
#include <string.h>
@@ -43,9 +44,9 @@ static uint64_t uma_memory_size = 0;
* remapping mechanism will overflow, the effects of which are unknown.
*/
-void do_hard_reset(void)
+void do_board_reset(void)
{
- outb((1 << 2) | (1 << 1), 0xcf9);
+ system_reset();
}
uint64_t get_uma_memory_base(void)