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authorStefan Reinauer <stefan.reinauer@coreboot.org>2016-03-11 20:22:28 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-04-19 18:34:18 +0200
commit86ddd732bd82b84724883b1f1579e18790611fe5 (patch)
treee52c4c88ceb7e14fd415031c56997d8c4054116e /src/northbridge
parent3812597c668b795d4fc85578021e501f2a56f6b9 (diff)
downloadcoreboot-86ddd732bd82b84724883b1f1579e18790611fe5.tar.xz
kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme
Reorder drivers to fit src/drivers/[X]/[Y]/ scheme to make them pluggable. Also, fix up the following driver subdirectories by switching to the src/drivers/[X]/[Y]/ scheme as these are hard requirements for the main change: * drivers/intel * drivers/pc80 * drivers/dec Change-Id: I455d3089a317181d5b99bf658df759ec728a5f6b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14047 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/vx900/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc
index 44f0ae01ce..b46f8809d6 100644
--- a/src/northbridge/via/vx900/Makefile.inc
+++ b/src/northbridge/via/vx900/Makefile.inc
@@ -27,7 +27,7 @@ romstage-y += ./../../../southbridge/via/common/early_smbus_is_busy.c
romstage-y += ./../../../southbridge/via/common/early_smbus_print_error.c
romstage-y += ./../../../southbridge/via/common/early_smbus_reset.c
romstage-y += ./../../../southbridge/via/common/early_smbus_wait_until_ready.c
-romstage-y += ./../../../drivers/pc80/udelay_io.c
+romstage-y += ./../../../drivers/pc80/pc/udelay_io.c
ramstage-y += pci_util.c
ramstage-y += pcie.c