summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-12 15:42:58 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-01-13 04:03:06 +0100
commitaf4bd599ca84478c9109a4bdba43a790ec5bbc2f (patch)
treebc84586a032b9fce953b96084237d1dc56b49a57 /src/northbridge
parent910ce017571b85f2139c9ab1fcd94a8a88dd4f48 (diff)
downloadcoreboot-af4bd599ca84478c9109a4bdba43a790ec5bbc2f.tar.xz
lib: Make log2() available in romstage on ARM, not just x86
On x86, log2() is defined as an inline function in arch/io.h. This is a remnant of ROMCC, and forced us to not include clog2.c in romstage. As a result, romstage on ARM has no log2(). Use the inline log2 only with ROMCC, but otherwise, use the one in clog2.c. Change-Id: Ifef2aa0a7b5a1db071a66f2eec0be421b8b2a56d Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4681 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdk8/incoherent_ht.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/i3100/raminit.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
4 files changed, 4 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index 6cbe7dc765..c1509f06c2 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -6,6 +6,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/hypertransport_def.h>
+#include <lib.h>
// Do we need allocate MMIO? Current We direct last 64M to sblink only, We can not lose access to last 4M range to ROM
#ifndef K8_ALLOCATE_MMIO_RANGE
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 3d4dfe2624..455f3ab5e4 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -16,6 +16,7 @@
#include <device/pci_def.h>
#include <arch/io.h>
#include <arch/cpu.h>
+#include <lib.h>
#include <stdlib.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index 0292496749..e83feaa414 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -22,6 +22,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/speedstep.h>
+#include <lib.h>
#include <stdlib.h>
#include "raminit.h"
#include "i3100.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 512d8e9260..046f5f8e3d 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -24,6 +24,7 @@
#include <spd.h>
#include <string.h>
#include <arch/io.h>
+#include <lib.h>
#include "raminit.h"
#include "i945.h"
#include <cbmem.h>