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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-08-26 12:43:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-26 12:43:58 +0000 |
| commit | d058ad1b4a5746190651e9feabfadb624c59a98d (patch) | |
| tree | be30a29e1540c8c822169bff3b60083aee89e942 /src/northbridge | |
| parent | 6e523a20cac0ef58e6d303c32255bf4ca3806e6b (diff) | |
| download | coreboot-d058ad1b4a5746190651e9feabfadb624c59a98d.tar.xz | |
One of my boards needs this mini delay in order to survive ram initialization.
Odd. The others don't.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/i945/raminit.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 23390cffb6..424fd2b6e9 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -62,6 +62,8 @@ static __attribute__((noinline)) void do_ram_command(u32 command) MCHBAR32(DCC) = reg32; /* This is the actual magic */ PRINTK_DEBUG("...done\n"); + + udelay(1); } static void ram_read32(u32 offset) |