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authorPatrick Rudolph <siro@das-labor.org>2017-04-12 16:50:26 +0200
committerMartin Roth <martinroth@google.com>2017-05-01 16:21:56 +0200
commitd0eb6cd8bd89ee47a8e3bf2948a2ff4196c761e3 (patch)
tree5f1de7b5a284833b07d659be198af5130b2934a3 /src/northbridge
parent0a4a4f7ae4188bccf4147196f08620453ef0633c (diff)
downloadcoreboot-d0eb6cd8bd89ee47a8e3bf2948a2ff4196c761e3.tar.xz
nb/intel/fsp_sandybridge/gma: Set up OpRegion in nb code
Set up IGD OpRegion in northbridge and fill in GNVS' aslb. At this point GNVS already has been set up by SSDT injection. Required for future VBT patches that will: * Use ACPI memory instead of CBMEM * Use common implementation to locate VBT * Fill in platform specific values Change-Id: Ie5d93117ee8bd8d15085aedbfa7358dfcf5f0045 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19307 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/fsp_sandybridge/gma.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c
index affbbc69bb..0034b06a23 100644
--- a/src/northbridge/intel/fsp_sandybridge/gma.c
+++ b/src/northbridge/intel/fsp_sandybridge/gma.c
@@ -19,6 +19,8 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <southbridge/intel/fsp_bd82x6x/nvs.h>
+#include <cbmem.h>
#include "chip.h"
#include "northbridge.h"
@@ -80,6 +82,30 @@ static void gma_ssdt(device_t device)
drivers_intel_gma_displays_ssdt_generate(gfx);
}
+static unsigned long
+gma_write_acpi_tables(struct device *const dev,
+ unsigned long current,
+ struct acpi_rsdp *const rsdp)
+{
+ igd_opregion_t *opregion;
+ global_nvs_t *gnvs;
+
+ // FIXME: Replace by common VBT implementation writing to current
+ opregion = igd_make_opregion();
+ if (opregion) {
+ /* GNVS has been already set up */
+ gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+ if (gnvs) {
+ /* IGD OpRegion Base Address */
+ gnvs->aslb = (u32)(uintptr_t)opregion;
+ } else {
+ printk(BIOS_ERR, "Error: GNVS table not found.\n");
+ }
+ }
+
+ return current;
+}
+
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
@@ -93,6 +119,7 @@ static struct device_operations gma_func0_ops = {
.scan_bus = 0,
.enable = 0,
.ops_pci = &gma_pci_ops,
+ .write_acpi_tables = gma_write_acpi_tables,
};
static const unsigned short gma_ids[] = {