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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-06 10:46:22 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-11 07:18:53 +0200
commitf9f74afdd7b39c12d399a900f3af326a33c87387 (patch)
tree064d869087e861b668eb79b07203d0c40cc772d1 /src/northbridge
parentbc90e15d3f8e841ccf229fca5d7df99436ff4bdb (diff)
downloadcoreboot-f9f74afdd7b39c12d399a900f3af326a33c87387.tar.xz
CBMEM x86: Unify get_cbmem_toc()
Remove any chipset-specific implementations and use arch-specific implementation of get_cbmem_table() instead. Change-Id: I338ee2c1bd51f5e517462115170dc926e040159e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3907 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/raminit.c5
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c8
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c5
-rw-r--r--src/northbridge/via/vx900/early_vx900.c5
4 files changed, 0 insertions, 23 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index b1a0684b8e..b50f1d80a1 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -28,11 +28,6 @@
#include "i945.h"
#include <cbmem.h>
-struct cbmem_entry *get_cbmem_toc(void)
-{
- return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
/* Debugging macros. */
#if CONFIG_DEBUG_RAM_SETUP
#define PRINTK_DEBUG(x...) printk(BIOS_DEBUG, x)
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 4abcec33cb..a03b8a6492 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -58,14 +58,6 @@ unsigned long get_top_of_ram(void)
return (unsigned long) tom;
}
-struct cbmem_entry *get_cbmem_toc(void)
-{
- static struct cbmem_entry *toc = NULL;
- if (!toc)
- toc = (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
- return toc;
-}
-
/* Reserve everything between A segment and 1MB:
*
* 0xa0000 - 0xbffff: legacy VGA
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 3eb2fb3e79..3b321d72b2 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -305,11 +305,6 @@ void sdram_initialize(struct pei_data *pei_data)
save_mrc_data(pei_data);
}
-struct cbmem_entry *get_cbmem_toc(void)
-{
- return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
unsigned long get_top_of_ram(void)
{
/* Base of TSEG is top of usable DRAM */
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c
index 2439c8db4c..2896680b32 100644
--- a/src/northbridge/via/vx900/early_vx900.c
+++ b/src/northbridge/via/vx900/early_vx900.c
@@ -27,11 +27,6 @@ unsigned long get_top_of_ram(void)
return (((unsigned long)reg_tom) << 24) - (256 << 20);
}
-struct cbmem_entry *get_cbmem_toc(void)
-{
- return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
-}
-
/**
* \brief Enable accessing of PCI configuration space for all devices.
*