summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-09-17 22:31:19 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-21 08:13:48 +0000
commit035096c6f0c8ebda3176ed41f341aa436c2b3009 (patch)
tree28eec4d072a6e1c508b00af278e568441aa3c1fd /src/northbridge
parent8c6d1610d1eb64695daecdd6704b99be15196fd9 (diff)
downloadcoreboot-035096c6f0c8ebda3176ed41f341aa436c2b3009.tar.xz
nb/intel/sandybridge: Simplify SPD validity check
Instead of decoding the entire SPD, just check the memory type directly. Tested on Asus P8Z77-V LX2, still boots. Change-Id: I3afa0ca5aae984895e50fe7b3792192fdd2ee6c6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 6d0e845b56..9ad8fd47ef 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -167,10 +167,8 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
/* Count dimms on channel */
for (slot = 0; slot < NUM_SLOTS; slot++) {
spd_slot = 2 * channel + slot;
- printk(BIOS_DEBUG, "SPD probe channel%d, slot%d\n", channel, slot);
- spd_decode_ddr3(&dimm->dimm[channel][slot], spd[spd_slot]);
- if (dimm->dimm[channel][slot].dram_type == SPD_MEMORY_TYPE_SDRAM_DDR3)
+ if (spd[spd_slot][SPD_MEMORY_TYPE] == SPD_MEMORY_TYPE_SDRAM_DDR3)
ch_dimms++;
}