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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-13 23:00:41 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-13 23:00:41 +0000
commit212d0a2eaefac97c55ad932e775be68a975fe164 (patch)
tree6cd83b660f21ace2a3c9a3c9be4b1024dba19bfd /src/northbridge
parent6529c2a7172f166f53ec3d6204dd375cd6441579 (diff)
downloadcoreboot-212d0a2eaefac97c55ad932e775be68a975fe164.tar.xz
Remove various .c #includes from Intel i810/i82801ax/i82801bx boards.
This is pretty much the same mechanism as in r5929. - Use 'romstage-y' to turn i82801ax_early_smbus.c and i82801bx_early_smbus.c into distinct compilation units, and don't #include the files anymore in romstage.c files. - Ditto for northbridge/intel/i82810/raminit.c, and northbridge/intel/i82810/debug.c. - Add various header files which are now needed, drop unused includes. - Make functions that need to be visible non-static. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i82810/Makefile.inc3
-rw-r--r--src/northbridge/intel/i82810/debug.c4
-rw-r--r--src/northbridge/intel/i82810/i82810.h7
-rw-r--r--src/northbridge/intel/i82810/raminit.c12
-rw-r--r--src/northbridge/intel/i82810/raminit.h8
5 files changed, 29 insertions, 5 deletions
diff --git a/src/northbridge/intel/i82810/Makefile.inc b/src/northbridge/intel/i82810/Makefile.inc
index 16d702a24e..0c0a3c846d 100644
--- a/src/northbridge/intel/i82810/Makefile.inc
+++ b/src/northbridge/intel/i82810/Makefile.inc
@@ -20,3 +20,6 @@
driver-y += northbridge.c
+romstage-y += raminit.c
+romstage-y += debug.c
+
diff --git a/src/northbridge/intel/i82810/debug.c b/src/northbridge/intel/i82810/debug.c
index 55af01bc22..44ee197284 100644
--- a/src/northbridge/intel/i82810/debug.c
+++ b/src/northbridge/intel/i82810/debug.c
@@ -1,4 +1,6 @@
-static void dump_spd_registers(void)
+#include "raminit.h"
+
+void dump_spd_registers(void)
{
#if CONFIG_DEBUG_RAM_SETUP
int i;
diff --git a/src/northbridge/intel/i82810/i82810.h b/src/northbridge/intel/i82810/i82810.h
index 75d92cbbeb..6695754763 100644
--- a/src/northbridge/intel/i82810/i82810.h
+++ b/src/northbridge/intel/i82810/i82810.h
@@ -18,6 +18,9 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#ifndef NORTHBRIDGE_INTEL_I82810_I82810_H
+#define NORTHBRIDGE_INTEL_I82810_I82810_H
+
/*
* Datasheet:
* - Name: Intel 810 Chipset:
@@ -43,3 +46,7 @@
#define MISSC 0x72 /* Miscellaneous Control */
#define MISSC2 0x80 /* Miscellaneous Control 2 */
#define BUFF_SC 0x92 /* System Memory Buffer Strength Control */
+
+int smbus_read_byte(u8 device, u8 address);
+
+#endif
diff --git a/src/northbridge/intel/i82810/raminit.c b/src/northbridge/intel/i82810/raminit.c
index 3ddc8a02e6..83b21b1286 100644
--- a/src/northbridge/intel/i82810/raminit.c
+++ b/src/northbridge/intel/i82810/raminit.c
@@ -22,7 +22,13 @@
#include <spd.h>
#include <delay.h>
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include <console/console.h>
#include "i82810.h"
+#include "raminit.h"
/*-----------------------------------------------------------------------------
Macros and definitions.
@@ -421,7 +427,7 @@ static void set_dram_buffer_strength(void)
Public interface.
-----------------------------------------------------------------------------*/
-static void sdram_set_registers(void)
+void sdram_set_registers(void)
{
u8 reg8;
u16 did;
@@ -454,7 +460,7 @@ static void sdram_set_registers(void)
pci_write_config8(PCI_DEV(0, 0, 0), MISSC2, reg8);
}
-static void sdram_set_spd_registers(void)
+void sdram_set_spd_registers(void)
{
spd_set_dram_size();
set_dram_buffer_strength();
@@ -464,7 +470,7 @@ static void sdram_set_spd_registers(void)
/**
* Enable SDRAM.
*/
-static void sdram_enable(void)
+void sdram_enable(void)
{
int i;
diff --git a/src/northbridge/intel/i82810/raminit.h b/src/northbridge/intel/i82810/raminit.h
index f35832ecd0..fbf64239b2 100644
--- a/src/northbridge/intel/i82810/raminit.h
+++ b/src/northbridge/intel/i82810/raminit.h
@@ -27,4 +27,10 @@
/* DIMM0 is at 0x50, DIMM1 is at 0x51. */
#define DIMM_SPD_BASE 0x50
-#endif /* NORTHBRIDGE_INTEL_I82810_RAMINIT_H */
+/* Function prototypes. */
+void sdram_set_registers(void);
+void sdram_set_spd_registers(void);
+void sdram_enable(void);
+void dump_spd_registers(void);
+
+#endif