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authorEric Biederman <ebiederm@xmission.com>2004-10-23 02:47:13 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-23 02:47:13 +0000
commit60216355d21fae62daf00afa66443b03ed743e2a (patch)
tree18e3eb1ba2abbac7cc2e49803354ee1a1303e060 /src/northbridge
parent720a8f57ef1a1a4264354dd9601c53e12b82ae36 (diff)
downloadcoreboot-60216355d21fae62daf00afa66443b03ed743e2a.tar.xz
- With Xeon cpus it seems best to use the tsc calibrated with timer2 as
the time source. The apic timer also has a variable time base. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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