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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-07-11 07:55:21 +0300
committerPatrick Georgi <patrick@georgi-clan.de>2012-07-16 18:41:46 +0200
commitcc55b9b9199657834a946ea2de059c3fab3e3b10 (patch)
tree732d9757212623855ba25e0d925d292d441b5098 /src/northbridge
parent63f8c088307c5296809d9499b3b7cbaedb2a4440 (diff)
downloadcoreboot-cc55b9b9199657834a946ea2de059c3fab3e3b10.tar.xz
Define global uma_memory variables
Use of the uma_memory_base and _size variables is very scattered. Implementation of setup_uma_memory() will appear in each northbridge. It should be possible to do this setup entirely in northbridge code and get rid of the globals in a follow-up. Change-Id: I07ccd98c55a6bcaa8294ad9704b88d7afb341456 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1204 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c4
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c4
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c4
-rw-r--r--src/northbridge/intel/i82810/northbridge.c3
-rw-r--r--src/northbridge/intel/i82830/northbridge.c3
-rw-r--r--src/northbridge/intel/i945/northbridge.c3
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c3
-rw-r--r--src/northbridge/intel/sch/northbridge.c3
12 files changed, 0 insertions, 43 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 3a1eb7ba04..12d83ad9d3 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -908,10 +908,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void amdfam10_domain_set_resources(device_t dev)
{
#if CONFIG_PCI_64BIT_PREF_MEM
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 50694c7416..6a591c5851 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -338,10 +338,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void read_resources(device_t dev)
{
u32 nodeid;
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 9e6b257e0f..021a1db2bf 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -326,10 +326,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void read_resources(device_t dev)
{
u32 nodeid;
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index c76c963620..d9da183bc0 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -626,10 +626,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void domain_set_resources(device_t dev)
{
#if CONFIG_PCI_64BIT_PREF_MEM
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index ef5f1d8416..efc8e685dd 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -613,10 +613,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA == 1
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void domain_set_resources(device_t dev)
{
#if CONFIG_PCI_64BIT_PREF_MEM == 1
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index dd2a9aff16..41434e8fe5 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -847,10 +847,6 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#include <cbmem.h>
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void amdfam10_domain_set_resources(device_t dev)
{
#if CONFIG_PCI_64BIT_PREF_MEM
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 621c0f183b..8b9140dd5f 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -822,10 +822,6 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
#include <cbmem.h>
#endif
-#if CONFIG_GFXUMA
-extern uint64_t uma_memory_base, uma_memory_size;
-#endif
-
static void amdk8_domain_set_resources(device_t dev)
{
#if CONFIG_PCI_64BIT_PREF_MEM
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 78e37285f7..3337417460 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -62,9 +62,6 @@ static const struct pci_driver i810e_northbridge_driver __pci_driver = {
.device = 0x7124,
};
-/* IGD UMA memory */
-uint64_t uma_memory_base=0, uma_memory_size=0;
-
int add_northbridge_resources(struct lb_memory *mem)
{
printk(BIOS_DEBUG, "Adding IGD UMA memory area\n");
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 93bdc28196..22f59dc313 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -52,9 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x3575,
};
-/* IGD memory */
-uint64_t uma_memory_base=0, uma_memory_size=0;
-
int add_northbridge_resources(struct lb_memory *mem)
{
printk(BIOS_DEBUG, "Adding IGD UMA memory area\n");
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 40b1aaac96..58e70d7fa0 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -68,9 +68,6 @@ static int get_pcie_bar(u32 *base, u32 *len)
return 0;
}
-/* IDG memory */
-uint64_t uma_memory_base=0, uma_memory_size=0;
-
static void add_fixed_resources(struct device *dev, int index)
{
struct resource *resource;
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 6419f8ce17..b261c9d805 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -118,9 +118,6 @@ static int get_pcie_bar(u32 *base, u32 *len)
return 0;
}
-/* IDG memory */
-uint64_t uma_memory_base=0, uma_memory_size=0;
-
static void add_fixed_resources(struct device *dev, int index)
{
struct resource *resource;
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 57245b6bed..047d7dabc5 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -73,9 +73,6 @@ static int get_pcie_bar(u32 *base, u32 *len)
return 0;
}
-/* IDG memory */
-u64 uma_memory_base = 0, uma_memory_size = 0;
-
static void add_fixed_resources(struct device *dev, int index)
{
struct resource *resource;