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authorAngel Pons <th3fanbus@gmail.com>2020-09-14 16:54:42 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-21 08:03:06 +0000
commitdfca1697fc99613820cca791a95023afbf87c0eb (patch)
tree558e2efbb49f125c60227aaea4b9379f3ad80b49 /src/northbridge
parent14efbb464e78a38c126049abc5550034779aa98f (diff)
downloadcoreboot-dfca1697fc99613820cca791a95023afbf87c0eb.tar.xz
nb/intel/sandybridge: Introduce memmap.h
Move all memory map definitions into a separate header. Tested with BUILD_TIMELESS=1, Lenovo ThinkPad X230 remains identical. Change-Id: I7f2ff2a5cee8bf12e5dca74ff9f0b1a44e26cded Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45356 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/memmap.h14
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h8
2 files changed, 15 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/memmap.h b/src/northbridge/intel/sandybridge/memmap.h
new file mode 100644
index 0000000000..98251259e1
--- /dev/null
+++ b/src/northbridge/intel/sandybridge/memmap.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
+#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
+
+/* Northbridge BARs */
+#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
+#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
+#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
+
+#define GFXVT_BASE 0xfed90000ULL
+#define VTVC0_BASE 0xfed91000ULL
+
+#endif /* __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__ */
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 7b008e8354..9db5ae3978 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -20,13 +20,7 @@
#define IVB_STEP_K0 (BASE_REV_IVB + 5)
#define IVB_STEP_D0 (BASE_REV_IVB + 6)
-/* Northbridge BARs */
-#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
-#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
-#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
-
-#define GFXVT_BASE 0xfed90000ULL
-#define VTVC0_BASE 0xfed91000ULL
+#include "memmap.h"
/* Everything below this line is ignored in the DSDT */
#ifndef __ACPI__