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authorJonathan Kollasch <jakllsch@kollasch.net>2010-10-07 23:02:06 +0000
committerMyles Watson <mylesgw@gmail.com>2010-10-07 23:02:06 +0000
commite5b7507882d4ee042d9c4d03e2e763bb49774b43 (patch)
treeb4a01d7f719cf50cb4d440472b8a2a50025064c2 /src/northbridge
parenta3bd1b1b25bb3056a6cc092b7a17a383e119a21f (diff)
downloadcoreboot-e5b7507882d4ee042d9c4d03e2e763bb49774b43.tar.xz
Remove duplicate line from pci_ids.h.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Jonathan Kollasch <jakllsch@kollasch.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/Kconfig16
-rw-r--r--src/northbridge/amd/amdk8/Kconfig17
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c4
-rw-r--r--src/northbridge/amd/amdk8/incoherent_ht.c34
-rw-r--r--src/northbridge/amd/amdk8/raminit.c6
-rw-r--r--src/northbridge/amd/amdk8/raminit.h2
-rw-r--r--src/northbridge/via/vx800/examples/romstage.c1
7 files changed, 31 insertions, 49 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 7e5b9dca4f..8fc2653d02 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -26,75 +26,62 @@ config NORTHBRIDGE_AMD_AMDFAM10
select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
select MMCONF_SUPPORT
+if NORTHBRIDGE_AMD_AMDFAM10
config AGP_APERTURE_SIZE
hex
default 0x4000000
- depends on NORTHBRIDGE_AMD_AMDFAM10
config HT3_SUPPORT
bool
default y
- depends on NORTHBRIDGE_AMD_AMDFAM10
config AMDMCT
bool
default y
- depends on NORTHBRIDGE_AMD_AMDFAM10
config MEM_TRAIN_SEQ
int
default 0
- depends on NORTHBRIDGE_AMD_AMDFAM10
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
- depends on NORTHBRIDGE_AMD_AMDFAM10
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
- depends on NORTHBRIDGE_AMD_AMDFAM10
config MMCONF_BUS_NUMBER
int
default 256
- depends on NORTHBRIDGE_AMD_AMDFAM10
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/amdfam10/bootblock.c"
- depends on NORTHBRIDGE_AMD_AMDFAM10
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config DIMM_FBDIMM
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config DIMM_DDR2
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config DIMM_DDR3
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config DIMM_REGISTERED
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
if DIMM_FBDIMM
config DIMM_SUPPORT
@@ -123,5 +110,6 @@ if DIMM_DDR3
default 0x0005
endif
endif
+endif
source src/northbridge/amd/amdfam10/root_complex/Kconfig
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index 77a08f2f46..e3a71c1a5e 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -24,45 +24,40 @@ config NORTHBRIDGE_AMD_AMDK8
select HAVE_DEBUG_CAR
select HYPERTRANSPORT_PLUGIN_SUPPORT
+if NORTHBRIDGE_AMD_AMDK8
config AGP_APERTURE_SIZE
hex
default 0x4000000
- depends on NORTHBRIDGE_AMD_AMDK8
config K8_HT_FREQ_1G_SUPPORT
bool
default n
- depends on NORTHBRIDGE_AMD_AMDK8
config MEM_TRAIN_SEQ
int
default 0
- depends on NORTHBRIDGE_AMD_AMDK8
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
- depends on NORTHBRIDGE_AMD_AMDK8
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
- depends on NORTHBRIDGE_AMD_AMDK8
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default n
- depends on NORTHBRIDGE_AMD_AMDK8
+
+if K8_REV_F_SUPPORT
config DIMM_DDR2
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
config DIMM_REGISTERED
bool
default n
- depends on NORTHBRIDGE_AMD_AMDFAM10
if DIMM_DDR2
if DIMM_REGISTERED
@@ -76,6 +71,10 @@ if DIMM_DDR2
hex
default 0x0004
endif
-endif
+endif #DIMM_DDR2
+
+endif #K8_REV_F_SUPPORT
+
+endif #NORTHBRIDGE_AMD_K8
source src/northbridge/amd/amdk8/root_complex/Kconfig
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index f1f5bbc35c..30e0471347 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -1813,7 +1813,7 @@ static int optimize_link_coherent_ht(void)
return needs_reset;
}
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void setup_coherent_ht_domain(void)
#else
static int setup_coherent_ht_domain(void)
@@ -1835,7 +1835,7 @@ static int setup_coherent_ht_domain(void)
}
coherent_ht_finalize(nodes);
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
return optimize_link_coherent_ht();
#endif
}
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index 91ff6b00ee..46e696adbf 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -11,10 +11,6 @@
#define CONFIG_K8_HT_FREQ_1G_SUPPORT 0
#endif
-#ifndef RAMINIT_SYSINFO
- #define RAMINIT_SYSINFO 0
-#endif
-
#ifndef K8_ALLOCATE_IO_RANGE
#define K8_ALLOCATE_IO_RANGE 0
#endif
@@ -297,7 +293,7 @@ static int ht_optimize_link(
return needs_reset;
}
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid, struct sys_info *sysinfo)
#else
static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid)
@@ -308,7 +304,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
uint8_t next_unitid, last_unitid;
unsigned uoffs;
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
int reset_needed = 0;
#endif
@@ -415,7 +411,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
offs = ((flags>>10) & 1) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
- #if RAMINIT_SYSINFO == 1
+ #if CONFIG_RAMINIT_SYSINFO
/* store the link pair here and we will Setup the Hypertransport link later, after we get final FID/VID */
{
struct link_pair_st *link_pair = &sysinfo->link_pair[sysinfo->link_pair_num];
@@ -451,7 +447,7 @@ end_of_chain: ;
flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
pci_write_config16(PCI_DEV(bus, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags);
- #if RAMINIT_SYSINFO == 1
+ #if CONFIG_RAMINIT_SYSINFO
// Here need to change the dev in the array
int i;
for(i=0;i<sysinfo->link_pair_num;i++)
@@ -470,14 +466,14 @@ end_of_chain: ;
}
#endif
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
return reset_needed;
#endif
}
#if 0
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void ht_setup_chain(device_t udev, unsigned upos, struct sys_info *sysinfo)
#else
static int ht_setup_chain(device_t udev, unsigned upos)
@@ -501,7 +497,7 @@ static int ht_setup_chain(device_t udev, unsigned upos)
offset_unitid = 1;
#endif
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
ht_setup_chainx(udev, upos, 0, offset_unitid, sysinfo);
#else
return ht_setup_chainx(udev, upos, 0, offset_unitid);
@@ -636,7 +632,7 @@ static int set_ht_link_buffer_counts_chain(uint8_t ht_c_num, unsigned vendorid,
}
#endif
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void ht_setup_chains(uint8_t ht_c_num, struct sys_info *sysinfo)
#else
static int ht_setup_chains(uint8_t ht_c_num)
@@ -651,7 +647,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
device_t udev;
uint8_t i;
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
int reset_needed = 0;
#else
sysinfo->link_pair_num = 0;
@@ -692,7 +688,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
upos = ((reg & 0xf00)>>8) * 0x20 + 0x80;
udev = PCI_DEV(0, devpos, 0);
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
ht_setup_chainx(udev,upos,busn, offset_unitid, sysinfo); // all not
#else
reset_needed |= ht_setup_chainx(udev,upos,busn, offset_unitid); //all not
@@ -700,7 +696,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
}
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
reset_needed |= optimize_link_read_pointers_chain(ht_c_num);
return reset_needed;
@@ -712,7 +708,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
static inline unsigned get_nodes(void);
#endif
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void ht_setup_chains_x(struct sys_info *sysinfo)
#else
static int ht_setup_chains_x(void)
@@ -734,7 +730,7 @@ static int ht_setup_chains_x(void)
reg = pci_read_config32(PCI_DEV(0, 0x18, 0), 0x64);
/* update PCI_DEV(0, 0x18, 1) 0xe0 to 0x05000m03, and next_busn=0x3f+1 */
print_linkn_in("SBLink=", ((reg>>8) & 3) );
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
sysinfo->sblk = (reg>>8) & 3;
sysinfo->sbbusn = 0;
sysinfo->nodes = nodes;
@@ -840,7 +836,7 @@ static int ht_setup_chains_x(void)
}
}
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
sysinfo->ht_c_num = i;
ht_setup_chains(i, sysinfo);
sysinfo->sbdn = get_sbdn(sysinfo->sbbusn);
@@ -850,7 +846,7 @@ static int ht_setup_chains_x(void)
}
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static int optimize_link_incoherent_ht(struct sys_info *sysinfo)
{
// We need to use recorded link pair info to optimize the link
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index a48a835185..b6d9fef06e 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -45,7 +45,7 @@ static int controller_present(const struct mem_controller *ctrl)
return pci_read_config32(ctrl->f0, 0) == 0x11001022;
}
-#if RAMINIT_SYSINFO==1
+#if CONFIG_RAMINIT_SYSINFO
static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_info *sysinfo)
#else
static void sdram_set_registers(const struct mem_controller *ctrl)
@@ -2062,7 +2062,7 @@ static long spd_set_dram_timing(const struct mem_controller *ctrl, const struct
return dimm_mask;
}
-#if RAMINIT_SYSINFO==1
+#if CONFIG_RAMINIT_SYSINFO
static void sdram_set_spd_registers(const struct mem_controller *ctrl, struct sys_info *sysinfo)
#else
static void sdram_set_spd_registers(const struct mem_controller *ctrl)
@@ -2223,7 +2223,7 @@ static void set_hw_mem_hole(int controllers, const struct mem_controller *ctrl)
#endif
#define TIMEOUT_LOOPS 300000
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
static void sdram_enable(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo)
#else
static void sdram_enable(int controllers, const struct mem_controller *ctrl)
diff --git a/src/northbridge/amd/amdk8/raminit.h b/src/northbridge/amd/amdk8/raminit.h
index 7a548daf3b..9da8417fd0 100644
--- a/src/northbridge/amd/amdk8/raminit.h
+++ b/src/northbridge/amd/amdk8/raminit.h
@@ -15,7 +15,7 @@ struct sys_info;
void exit_from_self(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo);
void setup_resource_map(const unsigned int *register_values, int max);
-#if defined(__PRE_RAM__) && defined(RAMINIT_SYSINFO) && RAMINIT_SYSINFO == 1
+#if defined(__PRE_RAM__) && CONFIG_RAMINIT_SYSINFO
void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo);
#else
void sdram_initialize(int controllers, const struct mem_controller *ctrl);
diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 48f7173e8d..5f9dc52e67 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -20,7 +20,6 @@
#define ASSEMBLY 1
#define __PRE_RAM__
-#define RAMINIT_SYSINFO 1
#include <stdint.h>
#include <device/pci_def.h>