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| author | Arthur Heymans <arthur@aheymans.xyz> | 2016-06-18 21:52:30 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-08-09 10:43:03 +0200 |
| commit | eff0c6a99d5bbd57129c710033e7d0b5d5a684a7 (patch) | |
| tree | 674e30d42576c07ad046ed44422bc7ce078b6f0f /src/northbridge | |
| parent | 27f94eea6cf142a2bf92db96a6ae64cb380d78ca (diff) | |
| download | coreboot-eff0c6a99d5bbd57129c710033e7d0b5d5a684a7.tar.xz | |
x4x: make preallocated IGD memory a cmos option
This allows to set the preallocated memory for the IGD on x4x
using a cmos option.
If no cmos option is found a default value of 64M is used.
TESTED most options on ga-g41m-es2l with 2G dimm in one slot and 2x2G.
352M also works in contrast with gm45 where it is known to cause issues
with certain ram combinations.
Change-Id: I9051d080be82f6dfab37d353252e29b2ed1fca7f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/15492
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/x4x/early_init.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index b52229367f..a430538718 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include "iomap.h" #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ +#include <pc80/mc146818rtc.h> #include "x4x.h" void x4x_early_init(void) @@ -51,5 +52,12 @@ void x4x_early_init(void) /* Enable internal GFX */ pci_write_config32(d0f0, D0F0_DEVEN, BOARD_DEVEN); - pci_write_config16(d0f0, D0F0_GGC, 0x0170); + /* Set preallocated IGD size from cmos */ + u8 gfxsize; + + if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) { + /* 6 for 64MB, default if not set in cmos */ + gfxsize = 6; + } + pci_write_config16(d0f0, D0F0_GGC, 0x0100 | ((gfxsize + 1) << 4)); } |