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authorAlex Mauer <hawke@hawkesnest.net>2007-05-10 19:02:19 +0000
committerStefan Reinauer <stepan@openbios.org>2007-05-10 19:02:19 +0000
commitf05e85b390244e596dd0fc73bb774607b0c1ff9a (patch)
tree3428c44d9b8b66dcd91e7e51f3f7de4d9f242ad5 /src/northbridge
parent1346a27dee50e200b6e36bf378aa8ed10457b8f2 (diff)
downloadcoreboot-f05e85b390244e596dd0fc73bb774607b0c1ff9a.tar.xz
The attached patch sets the MA map type correctly for all DIMMs I was
able to find to test with the Epia. Signed-off-by: Alex Mauer <hawke@hawkesnest.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/vt8601/raminit.c28
1 files changed, 16 insertions, 12 deletions
diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c
index 1aa58224f7..b16d0be3c7 100644
--- a/src/northbridge/via/vt8601/raminit.c
+++ b/src/northbridge/via/vt8601/raminit.c
@@ -377,18 +377,22 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
if (!size)
continue;
- /* Calculate the value of MA mapping type register,
- * based on size of SDRAM chips. */
- size = (size & 0xffff) << (3 + 3);
- /* convert module size to be in Mbits */
- size /= spd_num_chips(slot);
- print_debug_hex16(size);
- print_debug(" is the chip size\r\n");
- if (size < 64)
- ma = 0;
- else if (size < 256)
- ma = 8;
- else
+ /* Read the row densities */
+ size = smbus_read_byte(0x50+slot, 0x1f);
+
+ /* Set the MA map type.
+ *
+ * 0xa should be another option, but when
+ * it would be used is unknown.
+ */
+
+ if (size < 16 ) /* less than 64 MB per side */
+ ma = 0x0;
+ else if (size < 32) /* less than 128MB per side */
+ ma = 0x8;
+ else if ( size < 64) /* less than 256MB per side */
+ ma = 0xc;
+ else /* 256MB or more per side */
ma = 0xe;
print_debug_hex16(ma);
print_debug(" is the MA type\r\n");