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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-04 13:49:07 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-20 07:03:43 +0100 |
| commit | f5e7fa22e7f1d4292d26e72e4a801cb4c6669e26 (patch) | |
| tree | 8c1ad599d736f9b8cf70b4def0fe506dbbf3a249 /src/northbridge | |
| parent | 260a6db7ec93c44d266c522f099e35e0116dddd5 (diff) | |
| download | coreboot-f5e7fa22e7f1d4292d26e72e4a801cb4c6669e26.tar.xz | |
AMD amdfam10: Always have HT3_SUPPORT
Change-Id: I6ce784fd9e7a6876a37c910c503fafa3a17bf96f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8348
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/Kconfig | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 17 |
2 files changed, 4 insertions, 17 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 5fb040186e..8e1c4f8d5f 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -33,10 +33,6 @@ config AGP_APERTURE_SIZE hex default 0x4000000 -config HT3_SUPPORT - bool - default y - config AMDMCT bool default y diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 40de13de3f..8f6d6f9bed 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -152,7 +152,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 s u32 ht_unitid_base[4]; // here assume only 4 HT device on chain u32 max_bus; u32 min_bus; - u32 is_sublink1 = (link->link_num > 3); device_t devx; u32 busses; u32 segn = max>>8; @@ -161,18 +160,16 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, u32 s #endif u32 max_devfn; -#if CONFIG_HT3_SUPPORT - if(is_sublink1) { + if (link->link_num > 3) { u32 regpos; u32 reg; regpos = 0x170 + 4 * (link->link_num & 3); // it is only on sublink0 reg = pci_read_config32(dev, regpos); if(reg & 1) return max; // already ganged no sblink1 devx = get_node_pci(nodeid, 4); - } else -#endif + } else { devx = dev; - + } link->cap = 0x80 + ((link->link_num & 3) * 0x20); do { @@ -1322,13 +1319,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max) /* Ok, We need to set the links for that device. * otherwise the device under it will not be scanned */ - int linknum; -#if CONFIG_HT3_SUPPORT - linknum = 8; -#else - linknum = 4; -#endif - add_more_links(cdb_dev, linknum); + add_more_links(cdb_dev, 8); } cores_found = 0; // one core |