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| author | Zheng Bao <zheng.bao@amd.com> | 2010-09-05 05:52:33 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-09-05 05:52:33 +0000 |
| commit | f7a999ae65cc5825ac8e2fce34638a142b444ce3 (patch) | |
| tree | 27f76eb3fb5e1c5a3e5507eaec911471f11b7d07 /src/northbridge | |
| parent | 08c92e03bf46e40559a25062fc77258c0eff2efb (diff) | |
| download | coreboot-f7a999ae65cc5825ac8e2fce34638a142b444ce3.tar.xz | |
Trivial. Currently the max frequency is preset as 400Mhz. We need to set a
platform specific value. Before that, we can set it manually if the boards
need to run in a higher frequency, which has been tested on Tilapia.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 09ade32f46..6eea6e4722 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -1295,6 +1295,7 @@ static void GetPresetmaxF_D(struct MCTStatStruc *pMCTstat, * Specific information. Return the least of these three in * DCTStatStruc.PresetmaxFreq. */ + /* TODO: Set the proper max frequency in wrappers/mcti_d.c. */ u16 proposedFreq; u16 word; |