summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorVladimir Serbinenko <phcoder@gmail.com>2014-08-16 10:51:06 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-08-16 15:06:10 +0200
commit084ed45a95a6afaf238572259e976d01320cf08b (patch)
treeaa9427305f28df95a3220c30510ea5daa2e40c9b /src/northbridge
parent16de28ae92ac05dcfb3963cf72c243f6dd4ca02d (diff)
downloadcoreboot-084ed45a95a6afaf238572259e976d01320cf08b.tar.xz
gm45: Make UMA size configurable.
Change-Id: I27b2ec70b9c77f3caf9d52788f46f5dc16045d1b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6686 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/gm45/igd.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 0a8f21e586..786919f08b 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -24,6 +24,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <console/console.h>
+#include <pc80/mc146818rtc.h>
#include "gm45.h"
@@ -40,6 +41,7 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
u16 reg16;
u32 reg32;
+ u8 gfxsize;
printk(BIOS_DEBUG, "Enabling IGD.\n");
@@ -61,12 +63,16 @@ static void enable_igd(const sysinfo_t *const sysinfo, const int no_peg)
/* Graphics Stolen Memory: 2MB GTT (0x0300) when VT-d disabled,
2MB GTT + 2MB shadow GTT (0x0b00) else. */
- /* Graphics Mode Select: 32MB framebuffer (0x0050) */
- /* TODO: We could switch to 64MB (0x0070), config flag? */
const u32 capid = pci_read_config32(mch_dev, D0F0_CAPID0 + 4);
reg16 = pci_read_config16(mch_dev, D0F0_GGC);
+
+ if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
+ /* 0 for 32MB */
+ gfxsize = 0;
+ }
+
reg16 &= 0xf00f;
- reg16 |= 0x0350;
+ reg16 |= 0x0300 | ((gfxsize + 5) << 4);
if (!(capid & (1 << (48 - 32))))
reg16 |= 0x0800;
pci_write_config16(mch_dev, D0F0_GGC, reg16);