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| author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-04-13 17:08:18 -0500 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-04-17 23:33:09 +0200 |
| commit | 0f3a18ad28b3d44e57806e5d77f15f04acd05543 (patch) | |
| tree | 945fb528273de8dbc46d811bf38ef1eed60d2e36 /src/northbridge | |
| parent | 79a27ac8b810e15509ec5656fa4b44b906f09385 (diff) | |
| download | coreboot-0f3a18ad28b3d44e57806e5d77f15f04acd05543.tar.xz | |
[nb|sb]/amd/[amdfam10|sb700]: Add LPC bridge ACPI names for NB/SB
Adds the necessary plumbing for acpi_device_path() to find the LPC
bridge on the AMD Family10h/15h northbridges and SB700 southbridge.
This is necessary for TPM support since the acpi path to the LPC bridge
doesn't match the built-in default in tpm.c
This is a port of GIT hash d8a2c1fb by Tobias Diedrich.
BUG=https://ticket.coreboot.org/issues/102
Change-Id: I1c514e335e194b2864599e5419cfaee830b94e38
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/19282
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index c23f04fee3..a306d25d75 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com> - * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering + * Copyright (C) 2015 - 2017 Timothy Pearson <tpearson@raptorengineering.com>, Raptor Engineering * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -644,6 +644,13 @@ static void mcf0_control_init(struct device *dev) { } +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +static const char *amdfam10_northbridge_acpi_name(struct device *dev) +{ + return ""; +} +#endif + static struct device_operations northbridge_operations = { .read_resources = amdfam10_read_resources, .set_resources = amdfam10_set_resources, @@ -653,6 +660,7 @@ static struct device_operations northbridge_operations = { #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) .write_acpi_tables = northbridge_write_acpi_tables, .acpi_fill_ssdt_generator = northbridge_acpi_write_vars, + .acpi_name = amdfam10_northbridge_acpi_name, #endif .enable = 0, .ops_pci = 0, @@ -1302,6 +1310,16 @@ static int amdfam10_get_smbios_data(device_t dev, int *handle, unsigned long *cu } #endif +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +static const char *amdfam10_domain_acpi_name(struct device *dev) +{ + if (dev->path.type == DEVICE_PATH_DOMAIN) + return "PCI0"; + + return NULL; +} +#endif + static struct device_operations pci_domain_ops = { .read_resources = amdfam10_domain_read_resources, .set_resources = amdfam10_domain_set_resources, @@ -1309,6 +1327,9 @@ static struct device_operations pci_domain_ops = { .init = NULL, .scan_bus = amdfam10_domain_scan_bus, .ops_pci_bus = pci_bus_default_ops, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .acpi_name = amdfam10_domain_acpi_name, +#endif #if CONFIG_GENERATE_SMBIOS_TABLES .get_smbios_data = amdfam10_get_smbios_data, #endif |