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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-01-03 10:23:28 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-07 10:28:59 +0000 |
| commit | 0f8b8d920c2f060bbe7a9139fde823e3b2e875d7 (patch) | |
| tree | 8d53a881ad95ab6a4e9e5ded8622d99fd2b0b360 /src/northbridge | |
| parent | f212cf3506a9ad3d699a4afe148bfd554932f7b8 (diff) | |
| download | coreboot-0f8b8d920c2f060bbe7a9139fde823e3b2e875d7.tar.xz | |
src: Move constant to the right side of comparison
Change-Id: I76d35a3643600f81a6da7e0af99c935ebd1c2fc7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/27015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/state_machine.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctardk4.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa/family16kb/state_machine.c b/src/northbridge/amd/agesa/family16kb/state_machine.c index e6796390bb..9840c1c73c 100644 --- a/src/northbridge/amd/agesa/family16kb/state_machine.c +++ b/src/northbridge/amd/agesa/family16kb/state_machine.c @@ -34,7 +34,7 @@ void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post) if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { status = OemInitResume(&Post->MemConfig.MemContext); - if (AGESA_SUCCESS == status) + if (status == AGESA_SUCCESS) Post->MemConfig.MemRestoreCtl = 1; } } diff --git a/src/northbridge/amd/amdmct/mct/mctardk4.c b/src/northbridge/amd/amdmct/mct/mctardk4.c index f7a4beeeeb..d112c4664b 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk4.c +++ b/src/northbridge/amd/amdmct/mct/mctardk4.c @@ -146,6 +146,6 @@ static void Get_ChannelPS_Cfg0_D(u8 MAAdimms, u8 Speed, u8 MAAload, } } p+=10; - } while (0xFF == *p); + } while (*p == 0xff); } } |