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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-13 21:46:46 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-19 07:58:43 +0000 |
| commit | 14ea2fc90cb4cb183b63cd8edd68c3168b398ce2 (patch) | |
| tree | c61813fa23be22d33ca9219a3aef217347ed8ff3 /src/northbridge | |
| parent | aae16330695ab1a3a3ed1a9068dc25bba00997fe (diff) | |
| download | coreboot-14ea2fc90cb4cb183b63cd8edd68c3168b398ce2.tar.xz | |
nb/intel/sandybridge: Do not hardcode resource indices
Other northbridges use an index variable to assign monotonically
incrementing values to each resource. Do it here as well.
Change-Id: I8719a1a5973a10531cf11b3307652212cb3d4895
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index c1cdea5428..ce28c05fd4 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -135,6 +135,7 @@ static void mc_read_resources(struct device *dev) uint32_t tseg_base, uma_size, tolud; uint16_t ggc; unsigned long long tomk; + unsigned long index = 3; pci_dev_read_resources(dev); @@ -238,9 +239,9 @@ static void mc_read_resources(struct device *dev) printk(BIOS_INFO, "Available memory below 4GB: %lluM\n", tomk >> 10); /* Report the memory regions */ - ram_resource(dev, 3, 0, legacy_hole_base_k); - ram_resource(dev, 4, legacy_hole_base_k + legacy_hole_size_k, - (tomk - (legacy_hole_base_k + legacy_hole_size_k))); + ram_resource(dev, index++, 0, legacy_hole_base_k); + ram_resource(dev, index++, legacy_hole_base_k + legacy_hole_size_k, + (tomk - (legacy_hole_base_k + legacy_hole_size_k))); /* * If >= 4GB installed, then memory from TOLUD to 4GB is remapped above TOM. @@ -248,11 +249,11 @@ static void mc_read_resources(struct device *dev) */ touud >>= 10; /* Convert to KB */ if (touud > 4096 * 1024) { - ram_resource(dev, 5, 4096 * 1024, touud - (4096 * 1024)); + ram_resource(dev, index++, 4096 * 1024, touud - (4096 * 1024)); printk(BIOS_INFO, "Available memory above 4GB: %lluM\n", (touud >> 10) - 4096); } - add_fixed_resources(dev, 6); + add_fixed_resources(dev, index++); } static void northbridge_dmi_init(struct device *dev) |