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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 17:21:08 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 11:46:51 +0000 |
| commit | 2b28a160618018b4d7b7930362e1088c2313901b (patch) | |
| tree | 044e169f851fb29f9842f8b14081f1ca64ba63a6 /src/northbridge | |
| parent | 9c538348d8ccaef2c3dd6b898a1f44b00ea59690 (diff) | |
| download | coreboot-2b28a160618018b4d7b7930362e1088c2313901b.tar.xz | |
sb/intel/bd82x6x: Make the pch_enable_lpc hook optional
This also changes the name to mainboard_pch_lpc_setup to better
reflect that it is an optional mainboard hook.
This adds an empty weakly linked default. The rationale behind this
change is that without an implementation of the hook some features
might not work but that the result is likely still able to boot, so it
can be made optional.
Change-Id: Ie8e6056b4c4aed3739d2d12b4224de36fe217189
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index d667e36571..cfda2e838b 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -212,7 +212,6 @@ void sandybridge_late_initialization(void); void northbridge_romstage_finalize(int s3resume); void early_init_dmi(void); -void pch_enable_lpc(void); /* mainboard_early_init: Optional mainboard callback run after console init but before raminit. */ void mainboard_early_init(int s3resume); |