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| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-14 00:56:58 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:36:12 +0200 |
| commit | 38613d079d9960111dbc334800c77d10b6c28132 (patch) | |
| tree | 89fe8a0fe34842e7dcdc15b6230a8e9585aedb14 /src/northbridge | |
| parent | 1a755605996e2b46af0245c169c8e96312bcdb80 (diff) | |
| download | coreboot-38613d079d9960111dbc334800c77d10b6c28132.tar.xz | |
soc/intel/skylake: provide poweroff() implementation
Implement poweroff() by putting the chipset into ACPI S5 state.
BUG=chrome-os-partner:54977
Change-Id: I9288dcee13347a8aa3f822ca3d75148ba2792859
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15688
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
0 files changed, 0 insertions, 0 deletions