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| author | Marc Jones <marc.jones@se-eng.com> | 2012-03-15 13:21:41 -0600 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2012-03-16 19:31:03 +0100 |
| commit | 5750ed253a6ed45e574a8855a7b7b1abe16eae88 (patch) | |
| tree | 924480cd692a6cba85fb9a378a5ede9748dc9edf /src/northbridge | |
| parent | 8d595698bfb1c6dd0d56ccd6bdb38ea112a60095 (diff) | |
| download | coreboot-5750ed253a6ed45e574a8855a7b7b1abe16eae88.tar.xz | |
Fix AMD Fam14 cbmen allocation
The Fam14 northbridge.c had hardcoded the cbmem size. It should use
in cbmem.h instead.
Change-Id: I910329fc98a4cf04dc81ef66f3aa05a1916f5b1d
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/790
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 25 |
1 files changed, 9 insertions, 16 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 92ca0ff0f8..15efe12b8b 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -28,6 +28,7 @@ #include <string.h> #include <bitops.h> #include <cpu/cpu.h> +#include <cbmem.h> #include <cpu/x86/lapic.h> @@ -325,11 +326,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif -#if CONFIG_WRITE_HIGH_TABLES==1 -#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB -extern uint64_t high_tables_base, high_tables_size; -#endif - #if CONFIG_GFXUMA == 1 extern uint64_t uma_memory_base, uma_memory_size; @@ -693,16 +689,13 @@ static void domain_set_resources(device_t dev) if (high_tables_base == 0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA == 1 - high_tables_base = - uma_memory_base - - (HIGH_TABLES_SIZE * 1024); + high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; #else - high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024; + high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE; #endif - high_tables_size = HIGH_TABLES_SIZE * 1024; - printk(BIOS_DEBUG, - " split: %dK table at =%08llx\n", - HIGH_TABLES_SIZE, high_tables_base); + high_tables_size = HIGH_MEMORY_SIZE; + printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", + (u32)(high_tables_size / 1024), high_tables_base); } #endif } @@ -726,12 +719,12 @@ static void domain_set_resources(device_t dev) if (high_tables_base == 0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA == 1 - high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024); + high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE; printk(BIOS_DEBUG, " adsr - uma_memory_base = %llx.\n", uma_memory_base); #else - high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024; + high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE; #endif - high_tables_size = HIGH_TABLES_SIZE * 1024; + high_tables_size = HIGH_MEMORY_SIZE; } #endif } |