diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-03 12:37:54 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-05 07:59:22 +0000 |
| commit | 88af0f38eb19f956e8df2b62254c10c7603a9a33 (patch) | |
| tree | 97fdbf21a0dca3c0f6c5473e9bf92c0b954df33a /src/northbridge | |
| parent | 02b13fd8cdfbfcb4858ec0e6f66688b96950198e (diff) | |
| download | coreboot-88af0f38eb19f956e8df2b62254c10c7603a9a33.tar.xz | |
cpu/intel/haswell: Switch to POSTCAR_STAGE
Tested on Google Peppy (Acer C720).
Change-Id: I1802547d7a5b3875689cc4e126e7c189a75defa9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/26793
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/Makefile.inc | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 5c8caea92d..5e6956edf0 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -21,6 +21,8 @@ config NORTHBRIDGE_INTEL_HASWELL select INTEL_GMA_ACPI select RELOCATABLE_RAMSTAGE select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + select POSTCAR_STAGE + select POSTCAR_CONSOLE if NORTHBRIDGE_INTEL_HASWELL diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc index c6d6b2eee8..055c2a8a0d 100644 --- a/src/northbridge/intel/haswell/Makefile.inc +++ b/src/northbridge/intel/haswell/Makefile.inc @@ -36,4 +36,6 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) mrc.bin-position := 0xfffa0000 mrc.bin-type := mrc +postcar-y += ram_calc.c + endif |