diff options
author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-17 18:27:42 -0600 |
---|---|---|
committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-19 04:13:19 +0100 |
commit | 9b4c888f7bb91ea5034802ab381f87c4c9729ad9 (patch) | |
tree | e30c37cb729232f6d6156e9c56a48f6897221003 /src/northbridge | |
parent | 96326d3aefa0cfe252b44c68b540653ec47e9aa9 (diff) | |
download | coreboot-9b4c888f7bb91ea5034802ab381f87c4c9729ad9.tar.xz |
nb/amd/ddr3: Make the maximum CDD a signed value
max_cdd_we_delta should be signed to allow for negative CDD.
Found-by: Coverity Scan #1347355
Change-Id: Iaccd1021680296d169c26c25e339f83fbd7cc065
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18162
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index b64ad54711..1ac91a1fb2 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -3027,7 +3027,7 @@ void fam15EnableTrainingMode(struct MCTStatStruc *pMCTstat, /* Disable training mode */ uint8_t lane; uint8_t dimm; - uint16_t max_cdd_we_delta; + int16_t max_cdd_we_delta; int16_t cdd_trwtto_we_delta; uint8_t receiver; uint8_t lane_count; |