diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-05-23 05:58:27 +1000 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-05-23 01:45:33 +0200 |
commit | ba363d3f185c30c51069cff711d8be8dccb3545f (patch) | |
tree | a26afe0f707e72fad4ae30e7a7ba6d3eae328139 /src/northbridge | |
parent | de6c3c846a448e1bdb6b9335510e0aa819371402 (diff) | |
download | coreboot-ba363d3f185c30c51069cff711d8be8dccb3545f.tar.xz |
northbridge/amd/amdmct: Superfluous parenthesis in if-statements
Remove superfluous parenthesis found in some if-statements, spotted by
Clang.
Change-Id: I98d2bf6b408caf320c5bcc8adb23d621b182976b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5817
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 10 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c | 2 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index 47b89b46d5..66eb88a7e9 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -1532,27 +1532,27 @@ static u8 AutoConfig_D(struct MCTStatStruc *pMCTstat, DramConfigLo |= 1 << 4; /* 75 Ohms ODT */ if (mctGet_NVbits(NV_MAX_DIMMS) == 8) { if (pDCTstat->Speed == 3) { - if ((pDCTstat->MAdimms[dct] == 4)) + if (pDCTstat->MAdimms[dct] == 4) DramConfigLo |= 1 << 5; /* 50 Ohms ODT */ } else if (pDCTstat->Speed == 4){ - if ((pDCTstat->MAdimms[dct] != 1)) + if (pDCTstat->MAdimms[dct] != 1) DramConfigLo |= 1 << 5; /* 50 Ohms ODT */ } } else { // FIXME: Skip for Ax versions - if ((pDCTstat->MAdimms[dct] == 4)) { + if (pDCTstat->MAdimms[dct] == 4) { if ( pDCTstat->DimmQRPresent != 0) { if ((pDCTstat->Speed == 3) || (pDCTstat->Speed == 4)) { DramConfigLo |= 1 << 5; /* 50 Ohms ODT */ } - } else if ((pDCTstat->MAdimms[dct] == 4)) { + } else if (pDCTstat->MAdimms[dct] == 4) { if (pDCTstat->Speed == 4) { if ( pDCTstat->DimmQRPresent != 0) { DramConfigLo |= 1 << 5; /* 50 Ohms ODT */ } } } - } else if ((pDCTstat->MAdimms[dct] == 2)) { + } else if (pDCTstat->MAdimms[dct] == 2) { DramConfigLo |= 1 << 5; /* 50 Ohms ODT */ } diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 7db13d20a1..90b7ed33ec 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -3380,7 +3380,7 @@ static void mct_BeforeDramInit_Prod_D(struct MCTStatStruc *pMCTstat, u32 dev = pDCTstat->dev_dct; if (pDCTstat->LogicalCPUID & AMD_DR_Dx) { - if ((pDCTstat->Speed == 3)) + if (pDCTstat->Speed == 3) dword = 0x00000800; else dword = 0x00000000; diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c index aba558fb2c..1446f4ff6b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c @@ -502,7 +502,7 @@ void prepareDimms(sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl) } } else { /* 1 or 4 Dimms per channel */ - if ((pDCTData->MaxDimmsInstalled == 4)) + if (pDCTData->MaxDimmsInstalled == 4) { tempW1 = 0x04; /* Rtt_Nom=RZQ/4=60 Ohm */ } |