diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-04 13:34:23 -0500 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-06-10 05:33:53 +0200 |
| commit | bbd2647b388320b10ae836f65b3d35754113dc02 (patch) | |
| tree | b4eae2af7822cad57335ce516f66b83aac3e70d4 /src/northbridge | |
| parent | efc01f0d22dc72c9c156740cf334ee8ac2cfe6cd (diff) | |
| download | coreboot-bbd2647b388320b10ae836f65b3d35754113dc02.tar.xz | |
northbridge/amd/amdmct: Honor MMCONF_BASE_ADDRESS
The MMIO hole start address was hardcoded on AMD Family 10h
systems. Use the MMCONF_BASE_ADDRESS Kconfig setting instead.
Change-Id: I204e904d96d14e99529fa5e524fd73e6ea256dc0
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/10427
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdmct/wrappers/mcti_d.c | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index 1706fce9ff..ea328935b2 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -31,6 +31,18 @@ #define NVRAM_DDR3_1066 2 #define NVRAM_DDR3_800 3 +/* The recommended maximum GFX Upper Memory Area + * size is 256M, however, to be on the safe side + * move TOM down by 512M. + */ +#define MAXIMUM_GFXUMA_SIZE 0x20000000 + +/* Do not allow less than 16M of DRAM in 32-bit space. + * This number is not hardware constrained and can be + * changed as needed. + */ +#define MINIMUM_DRAM_BELOW_4G 0x1000000 + static const uint16_t ddr2_limits[4] = {400, 333, 266, 200}; static const uint16_t ddr3_limits[4] = {800, 666, 533, 400}; @@ -159,17 +171,15 @@ static u16 mctGet_NVbits(u8 index) //val = 1; /* enable */ break; case NV_BottomIO: -#if !CONFIG_GFXUMA - val = 0xE0; /* address bits [31:24] */ -#elif CONFIG_GFXUMA - val = 0xC0; /* address bits [31:24] */ -#endif - break; case NV_BottomUMA: + /* address bits [31:24] */ #if !CONFIG_GFXUMA - val = 0xE0; /* address bits [31:24] */ + val = (CONFIG_MMCONF_BASE_ADDRESS >> 24); #elif CONFIG_GFXUMA - val = 0xC0; /* address bits [31:24] */ + #if (CONFIG_MMCONF_BASE_ADDRESS < (MAXIMUM_GFXUMA_SIZE + MINIMUM_DRAM_BELOW_4G)) + #error "MMCONF_BASE_ADDRESS is too small" + #endif + val = ((CONFIG_MMCONF_BASE_ADDRESS - MAXIMUM_GFXUMA_SIZE) >> 24); #endif break; case NV_ECC: |