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authorScott Duplichan <scott@notabs.org>2011-05-15 21:26:04 +0000
committerMarc Jones <marc.jones@amd.com>2011-05-15 21:26:04 +0000
commitdc312cca530940e4019bb3b0d9bbb97f9c748575 (patch)
tree1aacdfed1321efb2e22e711ca0a51ba478423f6d /src/northbridge
parent2b9143afccef8ec9454914ab6d084c1630edb849 (diff)
downloadcoreboot-dc312cca530940e4019bb3b0d9bbb97f9c748575.tar.xz
Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa_wrapper/family14/Kconfig4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa_wrapper/family14/Kconfig b/src/northbridge/amd/agesa_wrapper/family14/Kconfig
index 015f1d1e66..fe36b89edd 100644
--- a/src/northbridge/amd/agesa_wrapper/family14/Kconfig
+++ b/src/northbridge/amd/agesa_wrapper/family14/Kconfig
@@ -41,12 +41,12 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
config MMCONF_BASE_ADDRESS
hex
- default 0xe0000000
+ default 0xf8000000
depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
config MMCONF_BUS_NUMBER
int
- default 256
+ default 16
depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
config DIMM_DDR3