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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-12 13:45:52 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-12 17:41:02 +0100
commit0af61b6c82d7ff02426a26bf435b7c6ee768a602 (patch)
tree02066827b2a7ff20d11be95f7c344880a7f8e7dc /src/northbridge
parente4ac9c043a9bb0a6601bbdca1a99a3811f7c94d8 (diff)
downloadcoreboot-0af61b6c82d7ff02426a26bf435b7c6ee768a602.tar.xz
lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content
Change-Id: I5b93e5321e470f19ad22ca2cfdb1ebf3b340b252 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4659 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c2
-rw-r--r--src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c2
-rw-r--r--src/northbridge/intel/fsp_sandybridge/mrccache.c6
-rw-r--r--src/northbridge/intel/haswell/raminit.c2
-rw-r--r--src/northbridge/intel/sandybridge/mrccache.c9
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c2
6 files changed, 11 insertions, 12 deletions
diff --git a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
index 38bf975f51..cf84b3977c 100644
--- a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
+++ b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
@@ -428,7 +428,7 @@ AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
pVbiosImageInfo->ImagePtr = cbfs_get_file_content(
CBFS_DEFAULT_MEDIA, "pci"CONFIG_VGA_BIOS_ID".rom",
- CBFS_TYPE_OPTIONROM);
+ CBFS_TYPE_OPTIONROM, NULL);
/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
}
diff --git a/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c b/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
index eed8d40150..b290931ac0 100644
--- a/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
+++ b/src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
@@ -401,7 +401,7 @@ AGESA_STATUS fam16kb_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
pVbiosImageInfo->ImagePtr = cbfs_get_file_content(
CBFS_DEFAULT_MEDIA, "pci"CONFIG_VGA_BIOS_ID".rom",
- CBFS_TYPE_OPTIONROM);
+ CBFS_TYPE_OPTIONROM, NULL);
/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
}
diff --git a/src/northbridge/intel/fsp_sandybridge/mrccache.c b/src/northbridge/intel/fsp_sandybridge/mrccache.c
index a793880627..b8893ae8d7 100644
--- a/src/northbridge/intel/fsp_sandybridge/mrccache.c
+++ b/src/northbridge/intel/fsp_sandybridge/mrccache.c
@@ -58,10 +58,10 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
{
- u32 region_size;
- region_size = CONFIG_MRC_CACHE_SIZE;
+ size_t region_size;
*mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
- "mrc.cache", 0xac);
+ "mrc.cache", 0xac,
+ &region_size);
return region_size;
}
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index e916c5e8a5..5944eebb08 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -170,7 +170,7 @@ void sdram_initialize(struct pei_data *pei_data)
/* Locate and call UEFI System Agent binary. */
entry = (unsigned long)cbfs_get_file_content(
- CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
+ CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab, NULL);
if (entry) {
int rv;
asm volatile (
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index b8120a8c29..5d7c49ba88 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -66,16 +66,15 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache)
*/
static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
{
- u32 region_size;
#if CONFIG_CHROMEOS
- region_size = find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
+ return find_fmap_entry("RW_MRC_CACHE", (void **)mrc_region_ptr);
#else
- region_size = CONFIG_MRC_CACHE_SIZE;
+ size_t region_size;
*mrc_region_ptr = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
- "mrc.cache", 0xac);
+ "mrc.cache", 0xac, &region_size);
+ return region_size;
#endif
- return region_size;
}
/*
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 333a6b5296..6e5296563e 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -253,7 +253,7 @@ void sdram_initialize(struct pei_data *pei_data)
/* Locate and call UEFI System Agent binary. */
/* TODO make MRC blob (0xab?) defined in cbfs_core.h. */
entry = (unsigned long)cbfs_get_file_content(
- CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab);
+ CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab, NULL);
if (entry) {
int rv;
asm volatile (