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authorAngel Pons <th3fanbus@gmail.com>2020-03-22 12:49:27 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-26 10:19:46 +0000
commit0c3936e41b16f11abda5b0f78d5d38caa9f179e3 (patch)
tree1abc11ce701f4307688c73ced617b7f8dbdac04c /src/northbridge
parenta38fee31b59acd8e3f07ec89d4328e98b6979611 (diff)
downloadcoreboot-0c3936e41b16f11abda5b0f78d5d38caa9f179e3.tar.xz
nb/intel/sandybridge: Update comment
Expand a comment with additional information, and split it in two lines. Change-Id: I10389a1a575833c8ecc9a79a374c1816000f5667 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39757 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 90c7164350..a8480a7661 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -2501,7 +2501,10 @@ int discover_edges(ramctr_timing *ctrl)
MCHBAR32(IOSAV_DATA_CTL_ch(channel)) = 0;
}
- /* FIXME: under some conditions (older chipsets?) vendor BIOS sets both edges to the same value. */
+ /*
+ * FIXME: Under some conditions, vendor BIOS sets both edges to the same value. It will
+ * also use a single loop. It would seem that it is a debugging configuration.
+ */
MCHBAR32(IOSAV_DC_MASK) = 0x300;
printram("discover falling edges:\n[%x] = %x\n", IOSAV_DC_MASK, 0x300);