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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-04 15:23:03 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-03-09 05:59:28 +0100
commit11c79d7fc2c9e04828db8e54c199822e5fa749b8 (patch)
tree9ca58f0208c7e511ea8f8811f20851c5c84b9d50 /src/northbridge
parente0b6fbde41ffd92fe2c2ac9f9905b15a1ccc5846 (diff)
downloadcoreboot-11c79d7fc2c9e04828db8e54c199822e5fa749b8.tar.xz
AMD K8: Move the test for connected HyperTransport link
Change-Id: I7f8cbfcae7ec2a49e91ceda1eecdcf76b2137d8b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8549 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 29fa2a42a6..63f543e0a0 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -79,6 +79,23 @@ static void f1_write_config32(unsigned reg, u32 value)
}
}
+static bool is_non_coherent_link(struct device *dev, struct bus *link)
+{
+ u32 link_type;
+ do {
+ link_type = pci_read_config32(dev, link->cap + 0x18);
+ } while (link_type & ConnectionPending);
+
+ if (!(link_type & LinkConnected))
+ return false;
+
+ do {
+ link_type = pci_read_config32(dev, link->cap + 0x18);
+ } while (!(link_type & InitComplete));
+
+ return !!(link_type & NonCoherent);
+}
+
static u32 amdk8_nodeid(device_t dev)
{
return (dev->path.pci.devfn >> 3) - 0x18;
@@ -87,8 +104,6 @@ static u32 amdk8_nodeid(device_t dev)
static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_sblink,
u32 max)
{
-
- u32 link_type;
int i;
u32 busses, config_busses;
u32 free_reg, config_reg;
@@ -98,18 +113,9 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_
u32 max_devfn;
link->cap = 0x80 + (link->link_num * 0x20);
- do {
- link_type = pci_read_config32(dev, link->cap + 0x18);
- } while(link_type & ConnectionPending);
- if (!(link_type & LinkConnected)) {
- return max;
- }
- do {
- link_type = pci_read_config32(dev, link->cap + 0x18);
- } while(!(link_type & InitComplete));
- if (!(link_type & NonCoherent)) {
+ if (!is_non_coherent_link(dev, link))
return max;
- }
+
/* See if there is an available configuration space mapping
* register in function 1.
*/