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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-07-14 00:24:31 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2013-08-16 22:25:56 +0200
commit4159a8012eb7e0f492457b789999bbc56efc4713 (patch)
tree619470a205219ec4dd1d3f0e06d9ddc907426b78 /src/northbridge
parent95b573a2db59c21cc60cd6802194beb999919e7f (diff)
downloadcoreboot-4159a8012eb7e0f492457b789999bbc56efc4713.tar.xz
Correct spelling of shadow, setting and memory
Change-Id: Ic7d793754a8b59623b49b7a88c09b5c6b6ef2cf0 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3768 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/via/vx800/examples/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 7c3fb7ae87..b629137d95 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -431,7 +431,7 @@ g) Rx73h = 32h
if (boot_mode == 3) {
/* some idea of Libo.Feng at amd.com in http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
I want move the 1M data, I have to set some MTRRs myself. */
- /* seting mtrr before back memoy save s3 resume time about 0.14 seconds */
+ /* setting mtrr before back memory save s3 resume time about 0.14 seconds */
/*because CAR stack use cache, and here to use cache , must be careful,
1 during these mtrr code, must no function call, (after this mtrr, I think it should be ok to use function)
2 before stack switch, no use variable that have value set before this