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authorNico Huber <nico.h@gmx.de>2019-08-11 16:28:05 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-08-26 07:12:13 +0000
commit4a86b3b0368c6955d791a8a4d57da3741712b01e (patch)
treef6948393a3f49f2983a5e678fe74da6c75c46f6a /src/northbridge
parentc99d3afe3e78565937c215f882bd4b7fc586f66e (diff)
downloadcoreboot-4a86b3b0368c6955d791a8a4d57da3741712b01e.tar.xz
nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :)
Change-Id: I7d00ddf727e7250b767a1c4b58bf11b17e900fc1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34828 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/gm45/raminit.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index b7ccdecdad..7a30b761c5 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1799,7 +1799,8 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Perform ZQ calibration for DDR3. */
- ddr3_calibrate_zq();
+ if (sysinfo->spd_type == DDR3)
+ ddr3_calibrate_zq();
/* Perform receive-enable calibration. */
raminit_receive_enable_calibration(timings, dimms);