diff options
author | Martin Roth <martin@se-eng.com> | 2013-01-08 13:36:14 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-01-10 02:04:18 +0100 |
commit | 92dd172a573a7eff4774030fdfe5eb9625d59aa0 (patch) | |
tree | f95c626e494c74423eada71a5dd850d151cda585 /src/northbridge | |
parent | 238780c8da866c0f8a80a4c0004bc81d2a060a8d (diff) | |
download | coreboot-92dd172a573a7eff4774030fdfe5eb9625d59aa0.tar.xz |
Fix 2 infinite loops if IMC doesn't respond
ACPI code:
The ACPI code is not currently being compiled in by default, but
assuming that it will be at some point, I'm fixing the loop that
waits for the IMC to respond after sending it a command. The
loop now exits after 500ms, similar to the function in agesa.
Agesa Code:
a 16 bit variable will always be less than 100000. Change to
be a 32 bit variable.
Change-Id: I9430ef900a22d056871b744f3b1511abdfea516e
Signed-off-by: Martin Roth <martin@se-eng.com>
Reviewed-on: http://review.coreboot.org/2119
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge')
0 files changed, 0 insertions, 0 deletions