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authorVladimir Serbinenko <phcoder@gmail.com>2014-09-01 22:35:20 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-10-18 22:14:19 +0200
commit9a0b251680cf4aa9dbacde9c60d8579da81ed404 (patch)
tree9779d840214945f0a0792da589c7583e3f8f08f4 /src/northbridge
parent6c71a684a43dfd05e8d4043039ee0ee621526461 (diff)
downloadcoreboot-9a0b251680cf4aa9dbacde9c60d8579da81ed404.tar.xz
i3100: Convert to per-device ACPI
Change-Id: Id90db4f6ce1a5fb506c81bc3a6010d85b0aa8c43 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6940 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i3100/northbridge.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index dcce48d334..589c9c546d 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -33,6 +33,7 @@
#include <cpu/cpu.h>
#include "chip.h"
#include "i3100.h"
+#include <arch/acpi.h>
static u32 max_bus;
@@ -175,6 +176,30 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
((device & 0xffff) << 16) | (vendor & 0xffff));
}
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+
+unsigned long acpi_fill_mcfg(unsigned long current)
+{
+ device_t dev;
+ u64 mmcfg;
+
+ dev = dev_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_3100_MC, 0); // 0:0x13.0
+ if (!dev)
+ return current;
+
+ // MMCFG not supported or not enabled.
+ mmcfg = ((u64) pci_read_config16(dev, 0xce)) << 16;
+ if (!mmcfg)
+ return current;
+
+ current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *) current,
+ mmcfg, 0x0, 0x0, 0xff);
+
+ return current;
+}
+
+#endif
+
static struct pci_operations intel_pci_ops = {
.set_subsystem = intel_set_subsystem,
};