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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-06 07:08:46 +0100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-06 11:19:28 +0100 |
| commit | 9b29aad5263f2aeba21cf4d521e7798f9dedb2b9 (patch) | |
| tree | e513c718c9cb6960c4be58d2e5c299a0bab968f7 /src/northbridge | |
| parent | 6355cbff51966144d5b709a73e24622df3e96122 (diff) | |
| download | coreboot-9b29aad5263f2aeba21cf4d521e7798f9dedb2b9.tar.xz | |
Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"
This reverts commit 9270553fff23462fcb298f154296319bf3639d15.
Change-Id: I195f721ce7a18aac6c1aa6f4e0f9284455d531b0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8138
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/mrccache.c | 7 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/mrccache.c | 7 |
2 files changed, 12 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c index 88af78973d..a921e048dd 100644 --- a/src/northbridge/intel/haswell/mrccache.c +++ b/src/northbridge/intel/haswell/mrccache.c @@ -33,6 +33,11 @@ #include <vendorcode/google/chromeos/fmap.h> #endif +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); +} + static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -223,7 +228,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif /* !defined(__PRE_RAM__) */ +#endif struct mrc_data_container *find_current_mrc_cache(void) { diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index 664fb7fbfd..c84ff82b80 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -33,6 +33,11 @@ #include <vendorcode/google/chromeos/fmap.h> #endif +/* convert a pointer to flash area into the offset inside the flash */ +static inline u32 to_flash_offset(struct spi_flash *flash, void *p) { + return ((u32)p + flash->size); +} + static struct mrc_data_container *next_mrc_block( struct mrc_data_container *mrc_cache) { @@ -222,7 +227,7 @@ BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = { BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL), }; -#endif /* !defined(__PRE_RAM__) */ +#endif struct mrc_data_container *find_current_mrc_cache(void) { |