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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-09 11:13:18 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-23 19:56:52 +0100
commitbca985557e3a7dc94c954d7295a963f654886a08 (patch)
treed3504e6930d0e8dcd343a60f80f664bdf6239443 /src/northbridge
parentf7a42de725b2e5a2a7e3af7cee61291c56cd6518 (diff)
downloadcoreboot-bca985557e3a7dc94c954d7295a963f654886a08.tar.xz
X201: Move early nehalem S3 magic to right place.
This MCH magic needs to be done before GPIO. Now S3 (Suspend-to-RAM) works on X201. Change-Id: I319e57af52ff01083bfbffbcd883ac5f453320a1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4632 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/nehalem/early_init.c6
-rw-r--r--src/northbridge/intel/nehalem/raminit.c7
2 files changed, 6 insertions, 7 deletions
diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index 81bac87c2f..ee8c17a18c 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -166,4 +166,10 @@ void nehalem_early_initialization(int chipset_type)
pci_write_config32(PCI_DEV(0, 0x16, 0), 0x10, DEFAULT_HECIBAR);
pci_write_config32(PCI_DEV(0, 0x16, 0), PCI_COMMAND,
PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+
+ /* Magic for S3 resume. Must be done early. */
+ if (((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) == SLP_TYP_S3) {
+ MCHBAR32 (0x1e8) = (MCHBAR32(0x1e8) & ~1) | 6;
+ MCHBAR32 (0x1e8) = (MCHBAR32(0x1e8) & ~3) | 4;
+ }
}
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 2a5da1bd74..a855982a35 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -3815,13 +3815,6 @@ void raminit(const int s3resume)
unsigned channel, slot, lane, rank;
int i;
struct raminfo info;
- if (s3resume) {
- read_mchbar32(0x1e8);
- write_mchbar32(0x1e8, 0x6);
- read_mchbar32(0x1e8);
- write_mchbar32(0x1e8, 0x4);
- }
-
u8 x2ca8;
gav(x2ca8 = read_mchbar8(0x2ca8));