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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-01 14:50:12 +0000 |
| commit | e82618d03719e1c3f012b6ac227aa4b34ae4950b (patch) | |
| tree | 8b346ea13157962dc040299579101958b9fe738f /src/northbridge | |
| parent | f11b81d18d36ecf732452a861d79ecd75f380adc (diff) | |
| download | coreboot-e82618d03719e1c3f012b6ac227aa4b34ae4950b.tar.xz | |
Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,
rename it slightly, make it visible only on relevant northbridges,
drop it entirely from via boards (as they seem to have picked it
up from AMD code without using it themselves), and make it
default to false for all boards.
Some romstages used to set this to "true" (ie. "print debug output"),
but I didn't follow up on it in Kconfig - if you need it to debug CAR,
enable it yourself.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdfam10/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/debug.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/debug.c | 6 | ||||
| -rw-r--r-- | src/northbridge/via/vx800/examples/romstage.c | 1 |
5 files changed, 4 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 38eda7c37f..7e5b9dca4f 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -21,6 +21,7 @@ config NORTHBRIDGE_AMD_AMDFAM10 bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS + select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX select MMCONF_SUPPORT diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index 7aa7751820..df4c079bbe 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -26,7 +26,7 @@ static inline void print_debug_addr(const char *str, void *val) { -#if defined(CACHE_AS_RAM_ADDRESS_DEBUG) && CACHE_AS_RAM_ADDRESS_DEBUG == 1 +#if CONFIG_DEBUG_CAR printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val); #endif } diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 02a23ab36e..77a08f2f46 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -21,6 +21,7 @@ config NORTHBRIDGE_AMD_AMDK8 bool select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_SMBUS + select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT config AGP_APERTURE_SIZE diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c index 5cb996aa89..ee8050ea59 100644 --- a/src/northbridge/amd/amdk8/debug.c +++ b/src/northbridge/amd/amdk8/debug.c @@ -3,13 +3,9 @@ * */ -#ifndef CACHE_AS_RAM_ADDRESS_DEBUG -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 -#endif - static inline void print_debug_addr(const char *str, void *val) { -#if CACHE_AS_RAM_ADDRESS_DEBUG == 1 +#if CONFIG_DEBUG_CAR printk(BIOS_DEBUG, "------Address debug: %s%x------\n", str, val); #endif } diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c index 63755c3181..48f7173e8d 100644 --- a/src/northbridge/via/vx800/examples/romstage.c +++ b/src/northbridge/via/vx800/examples/romstage.c @@ -21,7 +21,6 @@ #define ASSEMBLY 1 #define __PRE_RAM__ #define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 #include <stdint.h> #include <device/pci_def.h> |