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| author | Ronald G. Minnich <rminnich@gmail.com> | 2005-11-23 21:01:08 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2005-11-23 21:01:08 +0000 |
| commit | fb0a64ba77dbf1fa00d07453c76b875cd124cfcb (patch) | |
| tree | 43738db444fd43b8b29ebe9db5a685b8edbd8066 /src/northbridge | |
| parent | 872141a40291b73f061ae95a78baadb557efcd83 (diff) | |
| download | coreboot-fb0a64ba77dbf1fa00d07453c76b875cd124cfcb.tar.xz | |
CAR patch from YH LU
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index db646a5265..36d2dcded5 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -192,6 +192,17 @@ static void enable_routing(u8 node) print_spew(" done.\r\n"); } +static void enable_apic_ext_id(u8 node) +{ + + u32 val; + + val = pci_read_config32(NODE_HT(node), 0x68); + val |= (HTTC_APIC_EXT_SPUR | HTTC_APIC_EXT_ID | HTTC_APIC_EXT_BRD_CST); + pci_write_config32(NODE_HT(node), 0x68, val); +} + + static void fill_row(u8 node, u8 row, u32 value) { pci_write_config32(NODE_HT(node), 0x40+(row<<2), value); |