diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-07-25 13:02:36 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-07-28 00:36:22 +0200 |
| commit | 0325dc6f7cbdad4fd29315bfcb7f4e54fb678f3e (patch) | |
| tree | c227dd6bba0827e4072cf60ffb60401960af4546 /src/northbridge | |
| parent | 2a12e2e8da2477d97b8774babd1a74dda65d11a0 (diff) | |
| download | coreboot-0325dc6f7cbdad4fd29315bfcb7f4e54fb678f3e.tar.xz | |
bootmode: Get rid of CONFIG_BOOTMODE_STRAPS
With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and
developer mode check functions to vboot. Thus, get rid of the
BOOTMODE_STRAPS option which controlled these functions under src/lib.
BUG=chrome-os-partner:55639
Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15868
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 4449ffca53..20779e7a77 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -457,7 +457,7 @@ static void gma_func0_init(struct device *dev) dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay; #if IS_ENABLED(CONFIG_CHROMEOS) - init_fb = developer_mode_enabled() || recovery_mode_enabled(); + init_fb = display_init_required(); #endif lightup_ok = panel_lightup(&dp, init_fb); gfx_set_init_done(1); diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 464f7c8694..469c4f2fa0 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -14,7 +14,6 @@ */ #include <console/console.h> -#include <bootmode.h> #include <string.h> #include <arch/io.h> #include <cbmem.h> @@ -25,6 +24,7 @@ #include <northbridge/intel/common/mrc_cache.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> +#include <vboot/vboot_common.h> #include "raminit.h" #include "pei_data.h" #include "haswell.h" @@ -121,7 +121,7 @@ void sdram_initialize(struct pei_data *pei_data) * Do not pass MRC data in for recovery mode boot, * Always pass it in for S3 resume. */ - if (!recovery_mode_enabled() || pei_data->boot_mode == 2) + if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2) prepare_mrc_cache(pei_data); /* If MRC data is not found we cannot continue S3 resume. */ diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 8754e4295c..9d131e6565 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -200,7 +200,7 @@ void sdram_initialize(struct pei_data *pei_data) * Do not pass MRC data in for recovery mode boot, * Always pass it in for S3 resume. */ - if (!recovery_mode_enabled() || pei_data->boot_mode == 2) + if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2) prepare_mrc_cache(pei_data); /* If MRC data is not found we cannot continue S3 resume. */ |