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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 19:51:45 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:33:58 +0000 |
| commit | 1850396dc474a223b4f4848f1489c5e5c7378ea9 (patch) | |
| tree | 9894316af8d2b816e85e0b4625af4bfcb8ac67c1 /src/northbridge | |
| parent | d19332ca3a68eeadcae73d5660834bcaadf02030 (diff) | |
| download | coreboot-1850396dc474a223b4f4848f1489c5e5c7378ea9.tar.xz | |
nb/intel/haswell: Use ASL 2.0 syntax
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 does not change.
Change-Id: I9c69028ff13efa6999b6110fbcd9233a09def991
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/acpi/hostbridge.asl | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index b8a1af8878..1d4eba69ff 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -173,12 +173,12 @@ Device (MCHC) If (Acquire (CTCM, 100)) { Return (0) } - If (LEqual (CTCD, CTCC)) { + If (CTCD == CTCC) { Release (CTCM) Return (0) } - Store ("Set TDP Down", Debug) + Debug = "Set TDP Down" /* Set CTC */ CTCS = CTCD @@ -214,7 +214,7 @@ Device (MCHC) Return (0) } - Store ("Set TDP Nominal", Debug) + Debug = "Set TDP Nominal" /* Set PL1 */ PL1V = CTDN |