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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-12 19:43:06 -0500
committerRonald G. Minnich <rminnich@gmail.com>2015-11-11 20:50:23 +0100
commite36fb7434c173e0d2f016a4e3e7af3ced5973726 (patch)
treebc5ce6af69949629377906b86b102273d6dde5b5 /src/northbridge
parent010d62311ec4be4a61dc9ee394da39d908f1f7a8 (diff)
downloadcoreboot-e36fb7434c173e0d2f016a4e3e7af3ced5973726.tar.xz
northbridge/amd/amdmct: Fix hang on boot due to invalid array access
Change-Id: I47755caf7d2ff59463c817e739f9cb2ddd367c18 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11989 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index a030f71e95..fecda0b24d 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -333,7 +333,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
#if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
uint8_t dimm;
- for (i = 0; i < 15; i = i + 2) {
+ for (i = 0; i < MAX_DIMMS_SUPPORTED; i = i + 2) {
if (pDCTstat->DIMMValid & (1 << i))
ch1_voltage |= pDCTstat->DimmConfiguredVoltage[i];
if (pDCTstat->DIMMValid & (1 << (i + 1)))
@@ -343,7 +343,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
for (i = 0; i < 2; i++) {
sDCTStruct *pDCTData = pDCTstat->C_DCTPtr[i];
highest_rank_count[i] = 0x0;
- for (dimm = 0; dimm < 8; dimm++) {
+ for (dimm = 0; dimm < MAX_DIMMS_SUPPORTED; dimm++) {
if (pDCTData->DimmRanks[dimm] > highest_rank_count[i])
highest_rank_count[i] = pDCTData->DimmRanks[dimm];
}