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| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-08 01:42:48 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-10 01:54:12 +0000 |
| commit | 306e8930a7c4a9e07eef34f0a2df49769da4775f (patch) | |
| tree | 4a314fd22e48fd7104098cb1180f8a9dc2eb8cf2 /src/northbridge | |
| parent | 26766fd85d87dcd328ca55c8a51a43222eca59f1 (diff) | |
| download | coreboot-306e8930a7c4a9e07eef34f0a2df49769da4775f.tar.xz | |
nb/intel/x4x: Drop unused `pci_ops.h` include
Tested with BUILD_TIMELESS=1, Intel DG43GT does not change.
Change-Id: I58162865d596574b8a52447624f0102b8dceefa4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42156
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/x4x/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/romstage.c b/src/northbridge/intel/x4x/romstage.c index 5f47359c09..5a30a8040a 100644 --- a/src/northbridge/intel/x4x/romstage.c +++ b/src/northbridge/intel/x4x/romstage.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <device/pci_ops.h> #include <console/console.h> #include <southbridge/intel/common/pmclib.h> #include <northbridge/intel/x4x/x4x.h> |