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authorRudolf Marek <r.marek@assembler.cz>2009-03-26 21:45:26 +0000
committerRudolf Marek <r.marek@assembler.cz>2009-03-26 21:45:26 +0000
commit3a8565a77bbf8f41c2c5560fb2c195c71949fc8c (patch)
tree05313fc08ce0431132e78979502632a9493cbd6b /src/northbridge
parent83da8dcf608d4b6549399581463fe484b71bca6f (diff)
downloadcoreboot-3a8565a77bbf8f41c2c5560fb2c195c71949fc8c.tar.xz
During the suspend/resume programming I came to an issue that first 4KB of
memory must be clear with 0s because otherwise the resources of K8 will be totally messed up. res = probe_resource(dev, 0x100 + (reg | link)); This is called with dev = NULL and this is no good for probe_resource at all. The attached patch fixes the potential problems and of course the problem itself. On one particular place was missing test if the device really exists. This was copied to fam10 and perhaps the same issue is in v3 (DID NOT check). The rest of the patch is just very paranoid and do all checkings. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Myles Watson <mylesgw@gmail.com> --This line, and those below, will be igno red-- M src/devices/pci_ops.c M src/northbridge/amd/amdk8/northbridge.c M src/northbridge/amd/amdfam10/northbridge.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c2
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c31
2 files changed, 19 insertions, 14 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index bdb743387d..95e09f4c6a 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -338,6 +338,8 @@ static int reg_useable(u32 reg,device_t goal_dev, u32 goal_nodeid,
for(nodeid = 0; !res && (nodeid < NODE_NUMS); nodeid++) {
device_t dev;
dev = __f0_dev[nodeid];
+ if (!dev)
+ continue;
for(link = 0; !res && (link < 8); link++) {
res = probe_resource(dev, 0x1000 + reg + (link<<16)); // 8 links, 0x1000 man f1,
}
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index c2c89d1ffb..59cbbff4d0 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -291,9 +291,11 @@ static int reg_useable(unsigned reg,
unsigned nodeid, link;
int result;
res = 0;
- for(nodeid = 0; !res && (nodeid < 8); nodeid++) {
+ for(nodeid = 0; !res && (nodeid < FX_DEVS); nodeid++) {
device_t dev;
dev = __f0_dev[nodeid];
+ if (!dev)
+ continue;
for(link = 0; !res && (link < 3); link++) {
res = probe_resource(dev, 0x100 + (reg | link));
}
@@ -760,14 +762,15 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
mem_hole.hole_startk = HW_MEM_HOLE_SIZEK;
mem_hole.node_id = -1;
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < FX_DEVS; i++) {
uint32_t base;
uint32_t hole;
base = f1_read_config32(0x40 + (i << 3));
if ((base & ((1<<1)|(1<<0))) != ((1<<1)|(1<<0))) {
continue;
}
-
+ if (!__f1_dev[i])
+ continue;
hole = pci_read_config32(__f1_dev[i], 0xf0);
if(hole & 1) { // we find the hole
mem_hole.hole_startk = (hole & (0xff<<24)) >> 10;
@@ -834,15 +837,15 @@ static void disable_hoist_memory(unsigned long hole_startk, int i)
limit = f1_read_config32(0x44 + (i << 3));
f1_write_config32(0x44 + (i << 3),limit - (hole_sizek << 2));
dev = __f1_dev[i];
- hoist = pci_read_config32(dev, 0xf0);
- if(hoist & 1) {
- pci_write_config32(dev, 0xf0, 0);
- }
- else {
- base = pci_read_config32(dev, 0x40 + (i << 3));
- f1_write_config32(0x40 + (i << 3),base - (hole_sizek << 2));
+ if (dev) {
+ hoist = pci_read_config32(dev, 0xf0);
+ if(hoist & 1) {
+ pci_write_config32(dev, 0xf0, 0);
+ } else {
+ base = pci_read_config32(dev, 0x40 + (i << 3));
+ f1_write_config32(0x40 + (i << 3),base - (hole_sizek << 2));
+ }
}
-
}
static uint32_t hoist_memory(unsigned long hole_startk, int i)
@@ -878,7 +881,7 @@ static uint32_t hoist_memory(unsigned long hole_startk, int i)
base |= (4*1024*1024)<<2;
f1_write_config32(0x40 + (i<<3), base);
}
- else
+ else if (dev)
{
hoist = /* hole start address */
((hole_startk << 10) & 0xff000000) +
@@ -1020,7 +1023,7 @@ static void pci_domain_set_resources(device_t dev)
#if HW_MEM_HOLE_SIZE_AUTO_INC == 1
//We need to double check if the mmio_basek is valid for hole setting, if it is equal to basek, we need to decrease it some
uint32_t basek_pri;
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < FX_DEVS; i++) {
uint32_t base;
uint32_t basek;
base = f1_read_config32(0x40 + (i << 3));
@@ -1045,7 +1048,7 @@ static void pci_domain_set_resources(device_t dev)
#endif
idx = 0x10;
- for(i = 0; i < 8; i++) {
+ for(i = 0; i < FX_DEVS; i++) {
uint32_t base, limit;
unsigned basek, limitk, sizek;
base = f1_read_config32(0x40 + (i << 3));