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author | Tristan Corrick <tristan@corrick.kiwi> | 2018-10-31 02:21:41 +1300 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-11-01 22:17:40 +0000 |
commit | 4817012e93131db7159050984b4a2a48e54f8989 (patch) | |
tree | d011cdb63d0a6e84143b9a2c58478b1227e9b52a /src/northbridge | |
parent | 4587f847578beacd7d18d03a6bd5e1d4069e2295 (diff) | |
download | coreboot-4817012e93131db7159050984b4a2a48e54f8989.tar.xz |
nb/intel/haswell: Add a PCI ID for a desktop memory controller
The PCI ID was taken from the output of `lspci` on an ASRock H81M-HDS.
Change-Id: Ie162cb7a27e313ffe612659e8444657a3772d3c9
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/haswell/haswell.h | 1 | ||||
-rw-r--r-- | src/northbridge/intel/haswell/northbridge.c | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 3099a59024..d14ee4fd2c 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -210,6 +210,7 @@ struct ied_header { u8 reserved[34]; } __packed; +#define PCI_DEVICE_ID_HSW_DESKTOP 0x0c00 #define PCI_DEVICE_ID_HSW_MOBILE 0x0c04 #define PCI_DEVICE_ID_HSW_ULT 0x0a04 diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c index 0453246748..ccfb2346bf 100644 --- a/src/northbridge/intel/haswell/northbridge.c +++ b/src/northbridge/intel/haswell/northbridge.c @@ -461,6 +461,12 @@ static struct device_operations mc_ops = { .ops_pci = &intel_pci_ops, }; +static const struct pci_driver mc_driver_hsw_normal __pci_driver = { + .ops = &mc_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_HSW_DESKTOP, +}; + static const struct pci_driver mc_driver_hsw_mobile __pci_driver = { .ops = &mc_ops, .vendor = PCI_VENDOR_ID_INTEL, |