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authorStefan Reinauer <stepan@coresystems.de>2010-03-30 09:56:35 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-30 09:56:35 +0000
commit8b547b19800ab85c97103c87fedbba7512add7d6 (patch)
treedca2f164b7e8ce106b57e6e0ab6eeaa15c72abbb /src/northbridge
parent9b70cb624387999787683bd5279f11f922debf7e (diff)
downloadcoreboot-8b547b19800ab85c97103c87fedbba7512add7d6.tar.xz
reduce warnings in MCP55 and Fam10 code
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdfam10/debug.c19
-rw-r--r--src/northbridge/amd/amdht/h3ncmn.c32
2 files changed, 23 insertions, 28 deletions
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index ca0a800f70..328de7e289 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -25,7 +25,7 @@
static void udelay_tsc(u32 us);
-static void print_debug_addr(const char *str, void *val)
+static inline void print_debug_addr(const char *str, void *val)
{
#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
@@ -41,7 +41,7 @@ static void print_debug_pci_dev(u32 dev)
#endif
}
-static void print_pci_devices(void)
+static inline void print_pci_devices(void)
{
device_t dev;
for(dev = PCI_DEV(0, 0, 0);
@@ -66,7 +66,7 @@ static void print_pci_devices(void)
}
}
-static void print_pci_devices_on_bus(u32 busn)
+static inline void print_pci_devices_on_bus(u32 busn)
{
device_t dev;
for(dev = PCI_DEV(busn, 0, 0);
@@ -117,7 +117,6 @@ static void dump_pci_device(u32 dev)
{
dump_pci_device_range(dev, 0, 4096);
}
-static u32 pci_read_config32_index_wait(device_t dev, u32 index_reg, u32 index);
static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start,
u32 size)
{
@@ -139,7 +138,7 @@ static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start,
}
print_debug("\n");
}
-static void dump_pci_device_index_wait(u32 dev, u32 index_reg)
+static inline void dump_pci_device_index_wait(u32 dev, u32 index_reg)
{
dump_pci_device_index_wait_range(dev, index_reg, 0, 0x54);
dump_pci_device_index_wait_range(dev, index_reg, 0x100, 0x08); //DIMM1 when memclk > 400Hz
@@ -148,7 +147,7 @@ static void dump_pci_device_index_wait(u32 dev, u32 index_reg)
}
-static void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
+static inline void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
{
int i;
print_debug_pci_dev(dev);
@@ -169,7 +168,7 @@ static void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
}
-static void dump_pci_devices(void)
+static inline void dump_pci_devices(void)
{
device_t dev;
for(dev = PCI_DEV(0, 0, 0);
@@ -195,7 +194,7 @@ static void dump_pci_devices(void)
}
-static void dump_pci_devices_on_bus(u32 busn)
+static inline void dump_pci_devices_on_bus(u32 busn)
{
device_t dev;
for(dev = PCI_DEV(busn, 0, 0);
@@ -293,7 +292,7 @@ static void dump_smbus_registers(void)
}
}
#endif
-static void dump_io_resources(u32 port)
+static inline void dump_io_resources(u32 port)
{
int i;
@@ -313,7 +312,7 @@ static void dump_io_resources(u32 port)
}
}
-static void dump_mem(u32 start, u32 end)
+static inline void dump_mem(u32 start, u32 end)
{
u32 i;
print_debug("dump_mem:");
diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c
index 5b038a3a58..f4696b6daf 100644
--- a/src/northbridge/amd/amdht/h3ncmn.c
+++ b/src/northbridge/amd/amdht/h3ncmn.c
@@ -1109,16 +1109,14 @@ void ht1SetCFGAddrMap(u8 cfgMapIndex, u8 secBus, u8 subBus, u8 targetNode, u8 ta
*/
u8 convertBitsToWidth(u8 value, cNorthBridge *nb)
{
- if (value == 1) {
- return 16;
- } else if (value == 0) {
- return 8;
- } else if (value == 5) {
- return 4;
- } else if (value == 4) {
- return 2;
+ switch(value) {
+ case 1: return 16;
+ case 0: return 8;
+ case 5: return 4;
+ case 4: return 2;
+ default: STOP_HERE; /* This is an error internal condition */
}
- STOP_HERE; /* This is an error internal condition */
+ return 0; // shut up GCC.
}
/**----------------------------------------------------------------------------------------
@@ -1138,16 +1136,14 @@ u8 convertBitsToWidth(u8 value, cNorthBridge *nb)
*/
u8 convertWidthToBits(u8 value, cNorthBridge *nb)
{
- if (value == 16) {
- return 1;
- } else if (value == 8) {
- return 0;
- } else if (value == 4) {
- return 5;
- } else if (value == 2) {
- return 4;
+ switch (value) {
+ case 16: return 1;
+ case 8: return 0;
+ case 4: return 5;
+ case 2: return 4;
+ default: STOP_HERE; /* This is an internal error condition */
}
- STOP_HERE; /* This is an internal error condition */
+ return 0; // shut up GCC
}
/**----------------------------------------------------------------------------------------