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authorStefan Reinauer <stepan@coresystems.de>2009-01-20 22:46:52 +0000
committerStefan Reinauer <stepan@openbios.org>2009-01-20 22:46:52 +0000
commit977ed2d99565fc35c52f50cbe310b7b211611e94 (patch)
tree40519a4bdadb2d527782dc826bde3c548e69c112 /src/northbridge
parentebb763fecf31e4bde782edb8ee96f15e1e45a3f0 (diff)
downloadcoreboot-977ed2d99565fc35c52f50cbe310b7b211611e94.tar.xz
fix small TOLUD issue in i945 raminit (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/raminit.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 349174927e..8220e9bbd3 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -497,7 +497,7 @@ static void sdram_detect_cas_latency_and_ram_speed(struct sys_info * sysinfo, u8
}
if (sysinfo->memory_frequency && sysinfo->cas) {
- printk_debug("Memory will be driven at %dMHz with CAS=%d clocks\n",
+ printk_debug("Memory will be driven at %dMHz with CAS=%d clocks\n",
sysinfo->memory_frequency, sysinfo->cas);
} else {
die("Could not find common memory frequency and CAS\n");
@@ -1348,11 +1348,11 @@ static int sdram_program_row_boundaries(struct sys_info *sysinfo)
/* Some extra checks needed. See 4.1.26 in the
* 82945G MCH datasheet (30750203)
*/
- pci_write_config8(PCI_DEV(0,0,0), TOLUD, tolud);
+ pci_write_config16(PCI_DEV(0,0,0), TOLUD, tolud);
printk_debug("C0DRB = 0x%08x\n", MCHBAR32(C0DRB0));
printk_debug("C1DRB = 0x%08x\n", MCHBAR32(C1DRB0));
- printk_debug("TOLUD = 0x%02x\n", tolud);
+ printk_debug("TOLUD = 0x%04x\n", tolud);
pci_write_config16(PCI_DEV(0,0,0), TOM, tolud>>3);