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authorSteven J. Magnani <steve@digidescorp.com>2005-10-28 18:59:04 +0000
committerSteven J. Magnani <steve@digidescorp.com>2005-10-28 18:59:04 +0000
commit987ca8e08c3307e46dde3b35c6190c504f0cbf19 (patch)
tree72e7b1658e2418d9394f4bd6ee4d51cb1d334981 /src/northbridge
parent984bab5740dea46b8da14c434c7bae7058565e9d (diff)
downloadcoreboot-987ca8e08c3307e46dde3b35c6190c504f0cbf19.tar.xz
Make #defined constants more descriptive.
This was missed in the checkin of raminit.c changes. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/e7501/raminit.h15
1 files changed, 11 insertions, 4 deletions
diff --git a/src/northbridge/intel/e7501/raminit.h b/src/northbridge/intel/e7501/raminit.h
index c1dc4baeaf..4f783b8cd7 100644
--- a/src/northbridge/intel/e7501/raminit.h
+++ b/src/northbridge/intel/e7501/raminit.h
@@ -1,11 +1,18 @@
#ifndef RAMINIT_H
#define RAMINIT_H
-#define DIMM_SOCKETS 4
+#define MAX_DIMM_SOCKETS_PER_CHANNEL 4
+#define MAX_NUM_CHANNELS 2
+#define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
+
struct mem_controller {
- device_t d0, d0f1;
- uint16_t channel0[DIMM_SOCKETS];
- uint16_t channel1[DIMM_SOCKETS];
+ device_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
+
+ // SMBus addresses of DIMM slots for each channel,
+ // in order from closest to MCH to furthest away
+ // 0 == not present
+ uint16_t channel0[MAX_DIMM_SOCKETS_PER_CHANNEL];
+ uint16_t channel1[MAX_DIMM_SOCKETS_PER_CHANNEL];
};