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authorEric Biederman <ebiederm@xmission.com>2004-11-15 17:01:05 +0000
committerEric Biederman <ebiederm@xmission.com>2004-11-15 17:01:05 +0000
commitbec8acedf18b4d35f95b4a4c254eb925bd4d53bd (patch)
tree35228d7e1a74ffbc9d4ae62df83b4c469fab7a35 /src/northbridge
parentcb364958a06136f1e65499b434dd90191013a4e1 (diff)
downloadcoreboot-bec8acedf18b4d35f95b4a4c254eb925bd4d53bd.tar.xz
- Comment on why optimize_link_read_pointers is safe on an Athlon64
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index f90b236f2a..1c795ade3e 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -606,6 +606,7 @@ static int optimize_link_read_pointers(unsigned nodes, int needs_reset)
for(link = 0; link < 3; link = link + 1) {
uint32_t link_type;
unsigned reg;
+ /* This works on an Athlon64 because unimplemented links return 0 */
reg = 0x98 + (link * 0x20);
link_type = pci_read_config32(f0_dev, reg);
if (link_type & LinkConnected) {